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[nrf fromtree] boards nrf_bsim: Add a new nrf54lm20bsim target
Add a new simulated nrf54lm20 cpuapp target Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 5428743)
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‎boards/native/nrf_bsim/Kconfig

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@@ -45,6 +45,16 @@ config BOARD_NRF54L15BSIM_NRF54L15_CPUAPP
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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config BOARD_NRF54LM20BSIM_NRF54LM20A_CPUAPP
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bool
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select SOC_SERIES_BSIM_NRF54LX
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select SOC_COMPATIBLE_NRF54LM20A
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select SOC_COMPATIBLE_NRF54LM20A_CPUAPP
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select CLOCK_CONTROL
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help
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Simulated NRF54LM20 Application core
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Will produce a console Linux process which can be executed natively.
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It needs the BabbleSim simulator both in compile time and to execute
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if SOC_SERIES_BSIM_NRFXX
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‎boards/native/nrf_bsim/Kconfig.nrf54lm20bsim

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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_NRF54LM20BSIM
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select SOC_POSIX

‎boards/native/nrf_bsim/board.yml

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vendor: zephyr
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socs:
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- name: nrf54l15
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- name: nrf54lm20bsim
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full_name: nRF54LM20 simulated boards (BabbleSim)
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vendor: zephyr
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socs:
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- name: nrf54lm20a
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# Note the 53 and 54 are referring to the real SOC yamls, but we only use their name and cpu-cluster
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# definitions. In practice these board uses the same native SOC (SOC_POSIX) as the nrf52_bsim

‎boards/native/nrf_bsim/board_soc.h

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#define OFFLOAD_SW_IRQ EGU0_IRQn
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#elif defined(CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUNET)
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#define OFFLOAD_SW_IRQ SWI0_IRQn
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#elif defined(CONFIG_BOARD_NRF54L15BSIM)
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#elif defined(CONFIG_SOC_SERIES_BSIM_NRF54LX)
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#define OFFLOAD_SW_IRQ SWI00_IRQn
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#endif
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‎boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <mem.h>
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#include <arm/nordic/nrf54lm20a_enga_cpuapp.dtsi>
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#include <../boards/nordic/nrf54lm20dk/nrf54lm20dk_nrf54lm20a-pinctrl.dtsi>
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/ {
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model = "Nordic NRF54LM20 BSIM NRF54LM20A Application MCU";
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compatible = "bsim,nrf54lm20-bsim-nrf54lm20a-cpuapp", "bsim,nrf54";
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chosen {
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zephyr,console = &uart20;
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zephyr,entropy = &rng;
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zephyr,bt-c2h-uart = &uart20;
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zephyr,flash-controller = &rram_controller;
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zephyr,flash = &cpuapp_rram;
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};
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/delete-node/ cpus;
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/delete-node/ sw-pwm;
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soc {
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/delete-node/ memory@20000000;
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/delete-node/ memory@20067c00;
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peripheral@50000000 {
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/delete-node/ vpr@4c000;
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/delete-node/ interrupt-controller@f0000000;
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/delete-node/spi@4d000;
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/delete-node/usbhs@5a000;
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/delete-node/i2c@c6000;
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/delete-node/spi@c6000;
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/delete-node/i2c@c7000;
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/delete-node/spi@c7000;
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/delete-node/i2c@c8000;
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/delete-node/spi@c8000;
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/delete-node/pdm@d0000;
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/delete-node/pdm@d1000;
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/delete-node/pwm@d2000;
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/delete-node/pwm@d3000;
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/delete-node/pwm@d4000;
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/delete-node/adc@d5000;
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/delete-node/nfct@d6000;
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/delete-node/qdec@e0000;
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/delete-node/qdec@e1000;
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/delete-node/tdm@e8000;
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/delete-node/i2c@ed000;
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/delete-node/spi@ed000;
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/delete-node/i2c@ee000;
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/delete-node/spi@ee000;
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/delete-node/i2c@104000;
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/delete-node/spi@104000;
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/delete-node/comparator@106000;
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/delete-node/watchdog@108000;
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/delete-node/watchdog@109000;
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/delete-node/regulator@120000;
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};
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};
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rng: rng {
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status = "okay";
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compatible = "nordic,nrf-cracen-ctrdrbg";
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};
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psa_rng: psa-rng {
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status = "disabled";
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};
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};
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&grtc {
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owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
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/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
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child-owned-channels = <3 4 7 8 9 10 11>;
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status = "okay";
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};
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&cpuapp_rram {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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storage_partition: partition@0 {
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label = "storage";
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reg = <0x0 DT_SIZE_K(500)>;
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};
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};
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};
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&uart20 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart20_default>;
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pinctrl-1 = <&uart20_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&uart30 {
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current-speed = <115200>;
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pinctrl-0 = <&uart30_default>;
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pinctrl-1 = <&uart30_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpiote20 {
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status = "okay";
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};
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&gpiote30 {
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status = "okay";
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};
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&temp {
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status = "okay";
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};
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&radio {
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status = "okay";
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/* These features are not yet supported by the RADIO model */
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/delete-property/ dfe-supported;
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/delete-property/ cs-supported;
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};
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&clock {
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status = "okay";
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};

‎boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.yaml

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identifier: nrf54lm20bsim/nrf54lm20a/cpuapp
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name: NRF54LM20 BabbleSim - Application Core target
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type: native
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arch: posix
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simulation:
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- name: native
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env:
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- BSIM_OUT_PATH
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toolchain:
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- zephyr
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supported:
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- counter
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- gpio
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testing:
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ignore_tags:
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- modem
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- bsim_skip_CI

‎boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp_defconfig

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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2023 Nordic Semiconductor ASA
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CONFIG_CONSOLE=y
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CONFIG_NO_OPTIMIZATIONS=y
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# Start SYSCOUNTER on driver init
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CONFIG_NRF_GRTC_START_SYSCOUNTER=y

‎modules/hal_nordic/nrfx/CMakeLists.txt

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@@ -66,6 +66,8 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L20_ENGA_CPUFLPR NRF_FLPR)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LM20A_ENGA NRF54LM20A_ENGA_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LM20A_ENGA_CPUAPP NRF_APPLICATION)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LM20A_ENGA_CPUFLPR NRF_FLPR)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_COMPATIBLE_NRF54LM20A NRF54LM20A_ENGA_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_COMPATIBLE_NRF54LM20A_CPUAPP NRF_APPLICATION)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9120 NRF9120_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9160 NRF9160_XXAA)
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