|
| 1 | +/* |
| 2 | + * Copyright (c) 2025 Nordic Semiconductor |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include "../nrf7002eb2_gpio_pins_2.dtsi" |
| 8 | + |
| 9 | +/ { |
| 10 | + chosen { |
| 11 | + zephyr,wifi = &wlan0; |
| 12 | + zephyr,console = &uart30; |
| 13 | + zephyr,shell-uart = &uart30; |
| 14 | + zephyr,uart-mcumgr = &uart30; |
| 15 | + zephyr,bt-mon-uart = &uart30; |
| 16 | + zephyr,bt-c2h-uart = &uart30; |
| 17 | + }; |
| 18 | + |
| 19 | + buttons { |
| 20 | + /delete-node/ button_3; |
| 21 | + }; |
| 22 | + |
| 23 | + aliases { |
| 24 | + /delete-property/ sw3; |
| 25 | + }; |
| 26 | +}; |
| 27 | + |
| 28 | +&gpio3 { |
| 29 | + status = "okay"; |
| 30 | +}; |
| 31 | + |
| 32 | +&pinctrl { |
| 33 | + spi22_default: spi22_default { |
| 34 | + group1 { |
| 35 | + psels = <NRF_PSEL(SPIM_SCK, 3, 3)>, |
| 36 | + <NRF_PSEL(SPIM_MISO, 3, 1)>, |
| 37 | + <NRF_PSEL(SPIM_MOSI, 3, 0)>; |
| 38 | + bias-pull-down; |
| 39 | + }; |
| 40 | + }; |
| 41 | + |
| 42 | + spi22_sleep: spi22_sleep { |
| 43 | + group1 { |
| 44 | + psels = <NRF_PSEL(SPIM_SCK, 3, 3)>, |
| 45 | + <NRF_PSEL(SPIM_MISO, 3, 1)>, |
| 46 | + <NRF_PSEL(SPIM_MOSI, 3, 0)>; |
| 47 | + bias-pull-down; |
| 48 | + low-power-enable; |
| 49 | + }; |
| 50 | + }; |
| 51 | + |
| 52 | + uart30_default: uart30_default { |
| 53 | + group1 { |
| 54 | + psels = <NRF_PSEL(UART_TX, 0, 6)>; |
| 55 | + }; |
| 56 | + |
| 57 | + group2 { |
| 58 | + psels = <NRF_PSEL(UART_RX, 0, 7)>; |
| 59 | + bias-pull-up; |
| 60 | + }; |
| 61 | + }; |
| 62 | + |
| 63 | + uart30_sleep: uart30_sleep { |
| 64 | + group1 { |
| 65 | + psels = <NRF_PSEL(UART_TX, 0, 6)>, |
| 66 | + <NRF_PSEL(UART_RX, 0, 7)>; |
| 67 | + low-power-enable; |
| 68 | + }; |
| 69 | + }; |
| 70 | +}; |
| 71 | + |
| 72 | +&spi22 { |
| 73 | + status = "okay"; |
| 74 | + cs-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; |
| 75 | + pinctrl-0 = <&spi22_default>; |
| 76 | + pinctrl-1 = <&spi22_sleep>; |
| 77 | + pinctrl-names = "default", "sleep"; |
| 78 | +}; |
| 79 | + |
| 80 | +/* uart20 has pin conflicts with EB-II shield hence disabling that |
| 81 | + * and enabling uart30 as console port. |
| 82 | + */ |
| 83 | +&uart20 { |
| 84 | + status = "disabled"; |
| 85 | +}; |
| 86 | + |
| 87 | +&uart30 { |
| 88 | + status = "okay"; |
| 89 | +}; |
0 commit comments