[nrf fromtree] arch: riscv: core: Enable RISCV IRQs for no multithreading

jaz1-nordic · rlubos · commit 1e7a13b9072b · 2024-07-29T13:06:15.000+02:00
Enable MSTATUS.IEN to allow RISCV interrupts for non-multithreaded applications. Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no> (cherry picked from commit 502fcac)
diff --git a/arch/riscv/core/thread.c b/arch/riscv/core/thread.c
@@ -212,6 +212,8 @@ FUNC_NORETURN void z_riscv_switch_to_main_no_multithreading(k_thread_entry_t mai
 	main_stack = (K_THREAD_STACK_BUFFER(z_main_stack) +
 		      K_THREAD_STACK_SIZEOF(z_main_stack));
 
+	irq_unlock(MSTATUS_IEN);
+
 	__asm__ volatile (
 	"mv sp, %0; jalr ra, %1, 0"
 	:

Original file line number	Diff line number	Diff line change
`@@ -212,6 +212,8 @@ FUNC_NORETURN void z_riscv_switch_to_main_no_multithreading(k_thread_entry_t mai`
`212`	`212`	`main_stack = (K_THREAD_STACK_BUFFER(z_main_stack) +`
`213`	`213`	`K_THREAD_STACK_SIZEOF(z_main_stack));`
`214`	`214`
	`215`	`+ irq_unlock(MSTATUS_IEN);`
	`216`	`+`
`215`	`217`	`__asm__ volatile (`
`216`	`218`	`"mv sp, %0; jalr ra, %1, 0"`
`217`	`219`	`:`