@@ -295,17 +295,17 @@ static inline int qspi_get_lines_read(uint8_t lines)
295295 return ret ;
296296}
297297
298- nrfx_err_t _nrfx_qspi_read (void * p_rx_buffer , size_t rx_buffer_length , uint32_t src_address )
298+ int _nrfx_qspi_read (void * p_rx_buffer , size_t rx_buffer_length , uint32_t src_address )
299299{
300300 return nrfx_qspi_read (p_rx_buffer , rx_buffer_length , src_address );
301301}
302302
303- nrfx_err_t _nrfx_qspi_write (void const * p_tx_buffer , size_t tx_buffer_length , uint32_t dst_address )
303+ int _nrfx_qspi_write (void const * p_tx_buffer , size_t tx_buffer_length , uint32_t dst_address )
304304{
305305 return nrfx_qspi_write (p_tx_buffer , tx_buffer_length , dst_address );
306306}
307307
308- nrfx_err_t _nrfx_qspi_init (nrfx_qspi_config_t const * p_config , nrfx_qspi_handler_t handler ,
308+ int _nrfx_qspi_init (nrfx_qspi_config_t const * p_config , nrfx_qspi_handler_t handler ,
309309 void * p_context )
310310{
311311 NRF_QSPI_Type * p_reg = NRF_QSPI ;
@@ -318,7 +318,7 @@ nrfx_err_t _nrfx_qspi_init(nrfx_qspi_config_t const *p_config, nrfx_qspi_handler
318318 /* LOG_DBG("%04x : IFTIMING", p_reg->IFTIMING & qspi_cfg->RDC4IO); */
319319
320320 /* ACTIVATE task fails for slave bitfile so ignore it */
321- return NRFX_SUCCESS ;
321+ return 0 ;
322322}
323323
324324
@@ -338,32 +338,6 @@ NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(QSPI_IF_BUS_NODE);
338338
339339IF_ENABLED (CONFIG_PINCTRL , (PINCTRL_DT_DEFINE (QSPI_IF_BUS_NODE )));
340340
341- /**
342- * @brief Converts NRFX return codes to the zephyr ones
343- */
344- static inline int qspi_get_zephyr_ret_code (nrfx_err_t res )
345- {
346- switch (res ) {
347- case NRFX_SUCCESS :
348- return 0 ;
349- case NRFX_ERROR_INVALID_PARAM :
350- case NRFX_ERROR_INVALID_ADDR :
351- return - EINVAL ;
352- case NRFX_ERROR_INVALID_STATE :
353- return - ECANCELED ;
354- #if NRF53_ERRATA_159_ENABLE_WORKAROUND
355- case NRFX_ERROR_FORBIDDEN :
356- LOG_ERR ("nRF5340 anomaly 159 conditions detected" );
357- LOG_ERR ("Set the CPU clock to 64 MHz before starting QSPI operation" );
358- return - ECANCELED ;
359- #endif
360- case NRFX_ERROR_BUSY :
361- case NRFX_ERROR_TIMEOUT :
362- default :
363- return - EBUSY ;
364- }
365- }
366-
367341static inline struct qspi_nor_data * get_dev_data (const struct device * dev )
368342{
369343 return dev -> data ;
@@ -430,11 +404,11 @@ static inline void qspi_trans_unlock(const struct device *dev)
430404#endif /* CONFIG_MULTITHREADING */
431405}
432406
433- static inline void qspi_wait_for_completion (const struct device * dev , nrfx_err_t res )
407+ static inline void qspi_wait_for_completion (const struct device * dev , int res )
434408{
435409 struct qspi_nor_data * dev_data = get_dev_data (dev );
436410
437- if (res == NRFX_SUCCESS ) {
411+ if (res == 0 ) {
438412#ifdef CONFIG_MULTITHREADING
439413 k_sem_take (& dev_data -> sync , K_FOREVER );
440414#else /* CONFIG_MULTITHREADING */
@@ -468,7 +442,7 @@ static inline void _qspi_complete(struct qspi_nor_data *dev_data)
468442
469443 qspi_complete (dev_data );
470444}
471- static inline void _qspi_wait_for_completion (const struct device * dev , nrfx_err_t res )
445+ static inline void _qspi_wait_for_completion (const struct device * dev , int res )
472446{
473447 if (!qspi_cfg -> easydma ) {
474448 return ;
@@ -498,7 +472,6 @@ static bool qspi_initialized;
498472static int qspi_device_init (const struct device * dev )
499473{
500474 struct qspi_nor_data * dev_data = get_dev_data (dev );
501- nrfx_err_t res ;
502475 int ret = 0 ;
503476
504477 if (!IS_ENABLED (CONFIG_NRF70_QSPI_LOW_POWER )) {
@@ -516,8 +489,7 @@ static int qspi_device_init(const struct device *dev)
516489#endif
517490
518491 if (!qspi_initialized ) {
519- res = nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
520- ret = qspi_get_zephyr_ret_code (res );
492+ ret = nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
521493 NRF_QSPI -> IFTIMING |= qspi_cfg -> RDC4IO ;
522494 qspi_initialized = (ret == 0 );
523495 }
@@ -542,7 +514,7 @@ static void _qspi_device_uninit(const struct device *dev)
542514#endif
543515
544516 if (last ) {
545- while (nrfx_qspi_mem_busy_check () != NRFX_SUCCESS ) {
517+ while (nrfx_qspi_mem_busy_check () != 0 ) {
546518 if (IS_ENABLED (CONFIG_MULTITHREADING )) {
547519 k_msleep (50 );
548520 } else {
@@ -631,7 +603,7 @@ static int qspi_send_cmd(const struct device *dev, const struct qspi_cmd *cmd, b
631603 int res = nrfx_qspi_cinstr_xfer (& cinstr_cfg , tx_buf , rx_buf );
632604
633605 qspi_unlock (dev );
634- return qspi_get_zephyr_ret_code ( res ) ;
606+ return res ;
635607}
636608
637609/* RDSR wrapper. Negative value is error. */
@@ -739,16 +711,13 @@ static int qspi_nrfx_configure(const struct device *dev)
739711 k_busy_wait (BASE_CLOCK_SWITCH_DELAY_US );
740712#endif
741713
742- nrfx_err_t res = _nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
714+ int ret = _nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
743715
744716#if defined(CONFIG_SOC_SERIES_NRF53X )
745717 /* Restore the default /4 divider after the QSPI initialization. */
746718 nrf_clock_hfclk192m_div_set (NRF_CLOCK , NRF_CLOCK_HFCLK_DIV_4 );
747719 k_busy_wait (BASE_CLOCK_SWITCH_DELAY_US );
748720#endif
749-
750- int ret = qspi_get_zephyr_ret_code (res );
751-
752721 if (ret == 0 ) {
753722 /* Set QE to match transfer mode. If not using quad
754723 * it's OK to leave QE set, but doing so prevents use
@@ -805,7 +774,7 @@ static int qspi_nrfx_configure(const struct device *dev)
805774 return ret ;
806775}
807776
808- static inline nrfx_err_t read_non_aligned (const struct device * dev , int addr , void * dest ,
777+ static inline int read_non_aligned (const struct device * dev , int addr , void * dest ,
809778 size_t size )
810779{
811780 uint8_t __aligned (WORD_SIZE ) buf [WORD_SIZE * 2 ];
@@ -832,15 +801,15 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
832801 flash_suffix = size - flash_prefix - flash_middle ;
833802 }
834803
835- nrfx_err_t res = NRFX_SUCCESS ;
804+ int res = 0 ;
836805
837806 /* read from aligned flash to aligned memory */
838807 if (flash_middle != 0 ) {
839808 res = _nrfx_qspi_read (dptr + dest_prefix , flash_middle , addr + flash_prefix );
840809
841810 _qspi_wait_for_completion (dev , res );
842811
843- if (res != NRFX_SUCCESS ) {
812+ if (res != 0 ) {
844813 return res ;
845814 }
846815
@@ -856,7 +825,7 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
856825
857826 _qspi_wait_for_completion (dev , res );
858827
859- if (res != NRFX_SUCCESS ) {
828+ if (res != 0 ) {
860829 return res ;
861830 }
862831
@@ -869,7 +838,7 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
869838
870839 _qspi_wait_for_completion (dev , res );
871840
872- if (res != NRFX_SUCCESS ) {
841+ if (res != 0 ) {
873842 return res ;
874843 }
875844
@@ -890,39 +859,36 @@ static int qspi_nor_read(const struct device *dev, int addr, void *dest, size_t
890859 return 0 ;
891860 }
892861
893- int rc = qspi_device_init (dev );
862+ int ret = qspi_device_init (dev );
894863
895- if (rc != 0 ) {
864+ if (ret != 0 ) {
896865 goto out ;
897866 }
898867
899868 qspi_lock (dev );
900869
901- nrfx_err_t res = read_non_aligned (dev , addr , dest , size );
870+ ret = read_non_aligned (dev , addr , dest , size );
902871
903872 qspi_unlock (dev );
904-
905- rc = qspi_get_zephyr_ret_code (res );
906-
907873out :
908874 qspi_device_uninit (dev );
909- return rc ;
875+ return ret ;
910876}
911877
912878/* addr aligned, sptr not null, slen less than 4 */
913- static inline nrfx_err_t write_sub_word (const struct device * dev , int addr , const void * sptr ,
879+ static inline int write_sub_word (const struct device * dev , int addr , const void * sptr ,
914880 size_t slen )
915881{
916882 uint8_t __aligned (4 ) buf [4 ];
917- nrfx_err_t res ;
883+ int res ;
918884
919885 /* read out the whole word so that unchanged data can be
920886 * written back
921887 */
922888 res = _nrfx_qspi_read (buf , sizeof (buf ), addr );
923889 _qspi_wait_for_completion (dev , res );
924890
925- if (res == NRFX_SUCCESS ) {
891+ if (res == 0 ) {
926892 memcpy (buf , sptr , slen );
927893 res = _nrfx_qspi_write (buf , sizeof (buf ), addr );
928894 _qspi_wait_for_completion (dev , res );
@@ -947,11 +913,9 @@ static int qspi_nor_write(const struct device *dev, int addr, const void *src, s
947913 return - EINVAL ;
948914 }
949915
950- nrfx_err_t res = NRFX_SUCCESS ;
951-
952- int rc = qspi_device_init (dev );
916+ int res = qspi_device_init (dev );
953917
954- if (rc != 0 ) {
918+ if (res != 0 ) {
955919 goto out ;
956920 }
957921
@@ -969,11 +933,9 @@ static int qspi_nor_write(const struct device *dev, int addr, const void *src, s
969933 qspi_unlock (dev );
970934
971935 qspi_trans_unlock (dev );
972-
973- rc = qspi_get_zephyr_ret_code (res );
974936out :
975937 qspi_device_uninit (dev );
976- return rc ;
938+ return res ;
977939}
978940
979941/**
@@ -1459,7 +1421,7 @@ int qspi_enable_encryption(uint8_t *key)
14591421 memcpy (qspi_cfg -> p_cfg .key , key , 16 );
14601422
14611423 err = nrfx_qspi_dma_encrypt (& qspi_cfg -> p_cfg );
1462- if (err != NRFX_SUCCESS ) {
1424+ if (err != 0 ) {
14631425 LOG_ERR ("nrfx_qspi_dma_encrypt failed: %d" , err );
14641426 return - EIO ;
14651427 }
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