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carlescufinordicjm
carlescufi
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nordicjm
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[nrf fromtree] soc: nordic: Introduce the nRF54L05 and nRF54L10
These two new ICs are variants of the nRF54L15 with different memory sizes: - nRF54L05: 500KB RRAM, 96KB RAM - nRF54L10: 1022KB RRAM, 192KB RAM - nRF54L15: 1524KB RRAM, 256KB RAM Signed-off-by: Carles Cufi <[email protected]> (cherry picked from commit e788320)
1 parent 0d1265c commit 29e1f33

35 files changed

+8561
-939
lines changed

‎drivers/adc/adc_nrfx_saadc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ static const uint8_t saadc_psels[NRF_SAADC_AIN7 + 1] = {
3131
[NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1),
3232
[NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1),
3333
};
34-
#elif defined(CONFIG_SOC_NRF54L15)
34+
#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15)
3535
static const uint32_t saadc_psels[NRF_SAADC_DVDD + 1] = {
3636
[NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1),
3737
[NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1),
@@ -667,7 +667,7 @@ static const struct adc_driver_api adc_nrfx_driver_api = {
667667
#ifdef CONFIG_ADC_ASYNC
668668
.read_async = adc_nrfx_read_async,
669669
#endif
670-
#if defined(CONFIG_SOC_NRF54L15)
670+
#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15)
671671
.ref_internal = 900,
672672
#elif defined(CONFIG_NRF_PLATFORM_HALTIUM)
673673
.ref_internal = 1024,

‎drivers/comparator/comparator_nrf_comp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ static const uint32_t shim_nrf_comp_ain_map[] = {
7878
NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1),
7979
NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1),
8080
NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1),
81-
#elif defined(CONFIG_SOC_NRF54L15)
81+
#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15)
8282
NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1),
8383
NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1),
8484
NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1),

‎drivers/comparator/comparator_nrf_lpcomp.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ static const uint32_t shim_nrf_lpcomp_ain_map[] = {
4949
NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1),
5050
NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1),
5151
NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1),
52-
#elif defined(CONFIG_SOC_NRF54L15)
52+
#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15)
5353
NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1),
5454
NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1),
5555
NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1),

‎drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
#include <zephyr/toolchain.h>
1515

1616
#include <hal/nrf_vpr.h>
17-
#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
17+
#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
1818
#include <hal/nrf_spu.h>
1919
#endif
2020

@@ -41,7 +41,7 @@ static int nordic_vpr_launcher_init(const struct device *dev)
4141
}
4242
#endif
4343

44-
#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
44+
#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
4545
nrf_spu_periph_perm_secattr_set(NRF_SPU00, nrf_address_slave_get((uint32_t)config->vpr),
4646
true);
4747
#endif

‎dts/arm/nordic/nrf54l05_cpuapp.dtsi

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <nordic/nrf54l05.dtsi>
8+
#include "nrf54l_05_10_15_cpuapp.dtsi"

‎dts/arm/nordic/nrf54l10_cpuapp.dtsi

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <nordic/nrf54l10.dtsi>
8+
#include "nrf54l_05_10_15_cpuapp.dtsi"

‎dts/arm/nordic/nrf54l15_cpuapp.dtsi

Lines changed: 1 addition & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -5,84 +5,4 @@
55
*/
66

77
#include <nordic/nrf54l15.dtsi>
8-
9-
cpu: &cpuapp {};
10-
systick: &cpuapp_systick {};
11-
nvic: &cpuapp_nvic {};
12-
13-
/delete-node/ &cpuflpr;
14-
/delete-node/ &cpuflpr_rram;
15-
/delete-node/ &cpuflpr_sram;
16-
/delete-node/ &cpuflpr_clic;
17-
18-
/ {
19-
chosen {
20-
zephyr,bt-hci = &bt_hci_controller;
21-
};
22-
23-
soc {
24-
compatible = "simple-bus";
25-
interrupt-parent = <&cpuapp_nvic>;
26-
ranges;
27-
};
28-
29-
psa_rng: psa-rng {
30-
compatible = "zephyr,psa-crypto-rng";
31-
status = "disabled";
32-
};
33-
};
34-
35-
&bt_hci_controller {
36-
status = "okay";
37-
};
38-
39-
&cpuflpr_vpr {
40-
cpuapp_vevif_rx: mailbox@1 {
41-
compatible = "nordic,nrf-vevif-event-rx";
42-
reg = <0x0 0x1000>;
43-
status = "disabled";
44-
interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>;
45-
#mbox-cells = <1>;
46-
nordic,events = <1>;
47-
nordic,events-mask = <0x00100000>;
48-
};
49-
50-
cpuapp_vevif_tx: mailbox@0 {
51-
compatible = "nordic,nrf-vevif-task-tx";
52-
reg = <0x0 0x1000>;
53-
#mbox-cells = <1>;
54-
nordic,tasks = <7>;
55-
nordic,tasks-mask = <0x007f0000>;
56-
status = "disabled";
57-
};
58-
};
59-
60-
&cpuapp_ppb {
61-
compatible = "simple-bus";
62-
ranges;
63-
};
64-
65-
&grtc {
66-
#ifdef USE_NON_SECURE_ADDRESS_MAP
67-
interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>,
68-
#else
69-
interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>,
70-
#endif
71-
<229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */
72-
};
73-
74-
&gpiote20 {
75-
#ifdef USE_NON_SECURE_ADDRESS_MAP
76-
interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>;
77-
#else
78-
interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>;
79-
#endif
80-
};
81-
82-
&gpiote30 {
83-
#ifdef USE_NON_SECURE_ADDRESS_MAP
84-
interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>;
85-
#else
86-
interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>;
87-
#endif
88-
};
8+
#include "nrf54l_05_10_15_cpuapp.dtsi"

‎dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi

Lines changed: 86 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,86 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
cpu: &cpuapp {};
8+
systick: &cpuapp_systick {};
9+
nvic: &cpuapp_nvic {};
10+
11+
/delete-node/ &cpuflpr;
12+
/delete-node/ &cpuflpr_rram;
13+
/delete-node/ &cpuflpr_sram;
14+
/delete-node/ &cpuflpr_clic;
15+
16+
/ {
17+
chosen {
18+
zephyr,bt-hci = &bt_hci_controller;
19+
};
20+
21+
soc {
22+
compatible = "simple-bus";
23+
interrupt-parent = <&cpuapp_nvic>;
24+
ranges;
25+
};
26+
27+
psa_rng: psa-rng {
28+
compatible = "zephyr,psa-crypto-rng";
29+
status = "disabled";
30+
};
31+
};
32+
33+
&bt_hci_controller {
34+
status = "okay";
35+
};
36+
37+
&cpuflpr_vpr {
38+
cpuapp_vevif_rx: mailbox@1 {
39+
compatible = "nordic,nrf-vevif-event-rx";
40+
reg = <0x0 0x1000>;
41+
status = "disabled";
42+
interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>;
43+
#mbox-cells = <1>;
44+
nordic,events = <1>;
45+
nordic,events-mask = <0x00100000>;
46+
};
47+
48+
cpuapp_vevif_tx: mailbox@0 {
49+
compatible = "nordic,nrf-vevif-task-tx";
50+
reg = <0x0 0x1000>;
51+
#mbox-cells = <1>;
52+
nordic,tasks = <7>;
53+
nordic,tasks-mask = <0x007f0000>;
54+
status = "disabled";
55+
};
56+
};
57+
58+
&cpuapp_ppb {
59+
compatible = "simple-bus";
60+
ranges;
61+
};
62+
63+
&grtc {
64+
#ifdef USE_NON_SECURE_ADDRESS_MAP
65+
interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>,
66+
#else
67+
interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>,
68+
#endif
69+
<229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */
70+
};
71+
72+
&gpiote20 {
73+
#ifdef USE_NON_SECURE_ADDRESS_MAP
74+
interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>;
75+
#else
76+
interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>;
77+
#endif
78+
};
79+
80+
&gpiote30 {
81+
#ifdef USE_NON_SECURE_ADDRESS_MAP
82+
interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>;
83+
#else
84+
interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>;
85+
#endif
86+
};

‎dts/common/nordic/nrf54l05.dtsi

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "nrf54l_05_10_15.dtsi"
8+
9+
&cpuapp_sram {
10+
reg = <0x20000000 DT_SIZE_K(72)>;
11+
ranges = <0x0 0x20000000 DT_SIZE_K(72)>;
12+
};
13+
14+
/* 72 + 24 = 96KB */
15+
/ {
16+
soc {
17+
cpuflpr_sram: memory@20012000 {
18+
compatible = "mmio-sram";
19+
reg = <0x20012000 DT_SIZE_K(24)>;
20+
#address-cells = <1>;
21+
#size-cells = <1>;
22+
ranges = <0x0 0x20012000 DT_SIZE_K(24)>;
23+
};
24+
};
25+
};
26+
27+
&cpuapp_rram {
28+
reg = <0x0 DT_SIZE_K(470)>;
29+
};
30+
31+
/* 470 + 30 = 500KB */
32+
&rram_controller {
33+
cpuflpr_rram: rram@75800 {
34+
compatible = "soc-nv-flash";
35+
reg = <0x75800 DT_SIZE_K(30)>;
36+
erase-block-size = <4096>;
37+
write-block-size = <16>;
38+
};
39+
};

‎dts/common/nordic/nrf54l10.dtsi

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "nrf54l_05_10_15.dtsi"
8+
9+
&cpuapp_sram {
10+
reg = <0x20000000 DT_SIZE_K(144)>;
11+
ranges = <0x0 0x20000000 DT_SIZE_K(144)>;
12+
};
13+
14+
/* 144 + 48 = 192KB */
15+
/ {
16+
soc {
17+
cpuflpr_sram: memory@20024000 {
18+
compatible = "mmio-sram";
19+
reg = <0x20024000 DT_SIZE_K(48)>;
20+
#address-cells = <1>;
21+
#size-cells = <1>;
22+
ranges = <0x0 0x20024000 DT_SIZE_K(48)>;
23+
};
24+
};
25+
};
26+
27+
&cpuapp_rram {
28+
reg = <0x0 DT_SIZE_K(960)>;
29+
};
30+
31+
/* 960 + 62 = 1022KB */
32+
&rram_controller {
33+
cpuflpr_rram: rram@f0000 {
34+
compatible = "soc-nv-flash";
35+
reg = <0xf0000 DT_SIZE_K(62)>;
36+
erase-block-size = <4096>;
37+
write-block-size = <16>;
38+
};
39+
};

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