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Revert "[nrf noup] soc: nordic: nrf54l: Port Soc.c to be compatible with TFM"
This reverts commit ee23470. Signed-off-by: Michał Stasiak <[email protected]>
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soc/nordic/nrf54l/soc.c

Lines changed: 16 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -12,21 +12,13 @@
1212
* for the Nordic Semiconductor nRF54L family processor.
1313
*/
1414

15-
#ifdef __NRF_TFM__
16-
#include <autoconf.h>
17-
#endif
18-
1915
#include <zephyr/devicetree.h>
2016
#include <zephyr/dt-bindings/regulator/nrf5x.h>
2117
#include <zephyr/kernel.h>
2218
#include <zephyr/devicetree.h>
2319
#include <zephyr/init.h>
2420
#include <zephyr/logging/log.h>
25-
26-
#ifndef __NRF_TFM__
2721
#include <zephyr/cache.h>
28-
#endif
29-
3022
#include <zephyr/dt-bindings/regulator/nrf5x.h>
3123

3224
#if defined(NRF_APPLICATION)
@@ -48,9 +40,17 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
4840
#define HFXO_NODE DT_NODELABEL(hfxo)
4941
#endif
5042

51-
#if defined(NRF_APPLICATION)
52-
static inline void power_and_clock_configuration(void)
43+
static int nordicsemi_nrf54l_init(void)
5344
{
45+
/* Update the SystemCoreClock global variable with current core clock
46+
* retrieved from hardware state.
47+
*/
48+
SystemCoreClockUpdate();
49+
50+
#if defined(NRF_APPLICATION)
51+
/* Enable ICACHE */
52+
sys_cache_instr_enable();
53+
5454
#if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal)
5555
uint32_t xosc32ktrim = NRF_FICR->XOSC32KTRIM;
5656

@@ -77,16 +77,16 @@ static inline void power_and_clock_configuration(void)
7777
* NOTE: The desired capacitance value is used in encoded from in INTCAP calculation formula
7878
* That is different than in case of HFXO.
7979
*/
80-
uint32_t cap_val_encoded =
81-
(((DT_PROP(LFXO_NODE, load_capacitance_femtofarad) - 4000UL) * 2UL) / 1000UL);
80+
uint32_t cap_val_encoded = (((DT_PROP(LFXO_NODE, load_capacitance_femtofarad) - 4000UL)
81+
* 2UL) / 1000UL);
8282

8383
/* Calculation of INTCAP code before rounding. Min that calculations here are done on
8484
* values multiplied by 2^9, e.g. 0.765625 * 2^9 = 392.
8585
* offset_k should be divided by 2^6, but to add it to value shifted by 2^9 we have to
8686
* multiply it be 2^3.
8787
*/
88-
uint32_t mid_val =
89-
(cap_val_encoded - 4UL) * (uint32_t)(slope_k + 392UL) + (offset_k << 3UL);
88+
uint32_t mid_val = (cap_val_encoded - 4UL) * (uint32_t)(slope_k + 392UL)
89+
+ (offset_k << 3UL);
9090

9191
/* Get integer part of the INTCAP code */
9292
uint32_t lfxo_intcap = mid_val >> 9UL;
@@ -132,9 +132,8 @@ static inline void power_and_clock_configuration(void)
132132
*/
133133
uint32_t cap_val_femto_f = DT_PROP(HFXO_NODE, load_capacitance_femtofarad);
134134

135-
uint32_t mid_val_intcap = (((cap_val_femto_f - 5500UL) * (uint32_t)(slope_m + 791UL)) +
136-
(offset_m << 2UL) * 1000UL) >>
137-
8UL;
135+
uint32_t mid_val_intcap = (((cap_val_femto_f - 5500UL) * (uint32_t)(slope_m + 791UL))
136+
+ (offset_m << 2UL) * 1000UL) >> 8UL;
138137

139138
/* Convert the calculated value to piko Farads */
140139
uint32_t hfxo_intcap = mid_val_intcap / 1000;
@@ -168,40 +167,8 @@ static inline void power_and_clock_configuration(void)
168167
#if defined(CONFIG_ELV_GRTC_LFXO_ALLOWED)
169168
nrf_regulators_elv_mode_allow_set(NRF_REGULATORS, NRF_REGULATORS_ELV_ELVGRTCLFXO_MASK);
170169
#endif /* CONFIG_ELV_GRTC_LFXO_ALLOWED */
171-
}
172170
#endif /* NRF_APPLICATION */
173171

174-
int nordicsemi_nrf54l_init(void)
175-
{
176-
/* Update the SystemCoreClock global variable with current core clock
177-
* retrieved from hardware state.
178-
*/
179-
#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) || defined(__NRF_TFM__)
180-
/* Currently not supported for non-secure */
181-
SystemCoreClockUpdate();
182-
#endif
183-
184-
#ifdef __NRF_TFM__
185-
/* TF-M enables the instruction cache from target_cfg.c, so we
186-
* don't need to enable it here.
187-
*/
188-
#else
189-
/* Enable ICACHE */
190-
sys_cache_instr_enable();
191-
#endif
192-
193-
/* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure
194-
* as NRF_REGULATORS.POFCON is needed by the secure domain to
195-
* prevent glitches when the power supply is attacked.
196-
*
197-
* NRF_OSCILLATORS is also configured as secure because of a HW limitation
198-
* that requires them to be configured with the same security property.
199-
*/
200-
#if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \
201-
defined(__NRF_TFM__)
202-
power_and_clock_configuration();
203-
#endif
204-
205172
return 0;
206173
}
207174

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