[nrf fromlist] soc: nordic: Add gppi initialization

New GPPI requires instance to be initialized during system
boot up. GPPI is initialized with resource that can be
allocated.

Signed-off-by: Krzysztof Chruściński <[email protected]>

Author: nordic-krch

soc/nordic/nrf52/soc.c

@@ -19,12 +19,23 @@
 #include <hal/nrf_power.h>
 #include <lib/nrfx_coredep.h>
 #include <zephyr/logging/log.h>
+#include <helpers/nrfx_gppi.h>
 
 #include <cmsis_core.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);
 
+void gppi_init(void)
+{
+	static nrfx_gppi_t gppi_instance;
+
+	gppi_instance.ch_mask = BIT_MASK(PPI_CH_NUM) & ~NRFX_PPI_CHANNELS_USED;
+	gppi_instance.group_mask = BIT_MASK(PPI_GROUP_NUM) & ~NRFX_PPI_GROUPS_USED;
+
+	nrfx_gppi_init(&gppi_instance);
+}
+
 static int nordicsemi_nrf52_init(void)
 {
 #ifdef CONFIG_NRF_ENABLE_ICACHE
@@ -41,6 +52,10 @@ static int nordicsemi_nrf52_init(void)
 	nrf_power_dcdcen_vddh_set(NRF_POWER, true);
 #endif
 
+	if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) {
+		gppi_init();
+	}
+
 	return 0;
 }
 

soc/nordic/nrf53/soc.c

@@ -477,6 +477,17 @@ static int rtc_pretick_init(void)
 }
 #endif /* CONFIG_SOC_NRF53_RTC_PRETICK */
 
+BUILD_ASSERT(DPPIC_CH_NUM == 32);
+void gppi_init(void)
+{
+	static nrfx_gppi_t gppi_instance;
+
+	gppi_instance.ch_mask = UINT32_MAX & ~NRFX_DPPI_CHANNELS_USED;
+	gppi_instance.group_mask = BIT_MASK(DPPIC_GROUP_NUM) & ~NRFX_DPPI_GROUPS_USED;
+
+	nrfx_gppi_init(&gppi_instance);
+}
+
 void soc_early_init_hook(void)
 {
 #if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(CONFIG_NRF_ENABLE_CACHE)
@@ -557,6 +568,10 @@ void soc_early_init_hook(void)
 	__ASSERT_NO_MSG(err == 0);
 	(void)err;
 #endif
+
+	if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) {
+		gppi_init();
+	}
 }
 
 void soc_late_init_hook(void)

soc/nordic/nrf54l/soc.c

@@ -37,8 +37,6 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
 #define LFXO_NODE DT_NODELABEL(lfxo)
 #define HFXO_NODE DT_NODELABEL(hfxo)
 
-static nrfx_gppi_t gppi_instance;
-
 static inline void power_and_clock_configuration(void)
 {
 /* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure
@@ -153,6 +151,8 @@ static inline void power_and_clock_configuration(void)
 
 void gppi_init(void)
 {
+	static nrfx_gppi_t gppi_instance;
+
 	gppi_instance.routes = nrfx_gppi_routes_get();
 	gppi_instance.route_map = nrfx_gppi_route_map_get();
 	gppi_instance.nodes = nrfx_gppi_nodes_get();

soc/nordic/nrf91/soc.c

@@ -16,19 +16,34 @@
 #include <zephyr/init.h>
 #include <lib/nrfx_coredep.h>
 #include <zephyr/logging/log.h>
+#include <helpers/nrfx_gppi.h>
 
 #include <cmsis_core.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);
 
+void gppi_init(void)
+{
+	static nrfx_gppi_t gppi_instance;
+
+	gppi_instance.ch_mask = BIT_MASK(DPPIC_CH_NUM) & ~NRFX_DPPI_CHANNELS_USED;
+	gppi_instance.group_mask = BIT_MASK(DPPIC_GROUP_NUM) & ~NRFX_DPPI_GROUPS_USED;
+
+	nrfx_gppi_init(&gppi_instance);
+}
+
 static int nordicsemi_nrf91_init(void)
 {
 #ifdef CONFIG_NRF_ENABLE_ICACHE
 	/* Enable the instruction cache */
 	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
 #endif
 
+	if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) {
+		gppi_init();
+	}
+
 	return 0;
 }