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[nrf noup] boards: Add non-secure target for nrf54L15dk
This adds the nrf54l15dk/nrf54l15/cpuapp/ns board variant to sdk-zephyr. It allows to build nRF54l15dk with TF-M in nRF Connect SDK. This is done as a noup as the out-of-tree board extension feature is not available. When zephyrproject-rtos/zephyr#69548 is completed this commit can be reverted and the variant be placed in sdk-nrf. Signed-off-by: Tomi Fontanilles <[email protected]> (cherry picked from commit 6b4c840)
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‎boards/nordic/nrf54l15dk/Kconfig‎

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# nRF54L15 DK board configuration
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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config NRF_MPC_REGION_SIZE
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hex
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default 0x1000
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help
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Region size for the Memory Protection Controller (MPC) in bytes.
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config NRF_TRUSTZONE_FLASH_REGION_SIZE
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hex
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default NRF_MPC_REGION_SIZE
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help
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This defines the flash region size from the TRUSTZONE perspective.
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It is used when configuring the TRUSTZONE and when setting alignments
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requirements for the partitions.
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This abstraction allows us to configure TRUSTZONE without depending
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on peripheral specific symbols.
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config NRF_TRUSTZONE_RAM_REGION_SIZE
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hex
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default NRF_MPC_REGION_SIZE
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help
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This defines the RAM region size from the TRUSTZONE perspective.
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It is used when configuring the TRUSTZONE and when setting alignments
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requirements for the partitions.
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This abstraction allows us to configure TRUSTZONE without depending
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on peripheral specific symbols.
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endif #BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS

‎boards/nordic/nrf54l15dk/Kconfig.defconfig‎

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endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \
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# BOARD_NRF54L15DK_NRF54L15_CPUAPP
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if BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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config BT_CTLR
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default BT
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# By default, if we build for a Non-Secure version of the board,
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# enable building with TF-M as the Secure Execution Environment.
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config BUILD_WITH_TFM
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default y if BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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# By default, if we build with TF-M, instruct build system to
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# flash the combined TF-M (Secure) & Zephyr (Non Secure) image
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config TFM_FLASH_MERGED_BINARY
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default y
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depends on BUILD_WITH_TFM
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endif #BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS

‎boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk‎

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config BOARD_NRF54L15DK
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select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP
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select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP
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select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP
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select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP || BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS
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select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \
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BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP

‎boards/nordic/nrf54l15dk/board.cmake‎

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board_runner_args(jlink "--speed=4000")
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endif()
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if(BOARD_NRF54L15DK_NRF54L15_CPUAPP_NS)
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set(TFM_PUBLIC_KEY_FORMAT "full")
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endif()
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if(CONFIG_TFM_FLASH_MERGED_BINARY)
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set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
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endif()
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include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/nordic/nrf54l15dk/board.yml‎

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variants:
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- name: xip
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cpucluster: cpuflpr
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- name: ns
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cpucluster: cpuapp

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.dts‎

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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#define USE_NON_SECURE_ADDRESS_MAP 1
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#include <nordic/nrf54l15_cpuapp.dtsi>
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#include "nrf54l_05_10_15_cpuapp_common.dtsi"
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/ {
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compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp";
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model = "Nordic nRF54L15 DK nRF54L15 Application MCU";
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chosen {
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zephyr,code-partition = &slot0_partition;
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zephyr,sram = &cpuapp_sram;
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};
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};
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&cpuapp_rram {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x0 DT_SIZE_K(64)>;
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};
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slot0_partition: partition@10000 {
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label = "image-0";
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reg = <0x10000 DT_SIZE_K(324)>;
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};
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slot0_ns_partition: partition@61000 {
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label = "image-0-nonsecure";
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reg = <0x61000 DT_SIZE_K(324)>;
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};
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slot1_partition: partition@b2000 {
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label = "image-1";
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reg = <0xb2000 DT_SIZE_K(324)>;
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};
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slot1_ns_partition: partition@103000 {
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label = "image-1-nonsecure";
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reg = <0x103000 DT_SIZE_K(324)>;
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};
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/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
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storage_partition: partition@15c000 {
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label = "storage";
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reg = <0x15c000 DT_SIZE_K(36)>;
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};
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};
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};
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&uart30 {
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/* Disable so that TF-M can use this UART */
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status = "disabled";
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current-speed = <115200>;
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pinctrl-0 = <&uart30_default>;
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pinctrl-1 = <&uart30_sleep>;
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pinctrl-names = "default", "sleep";
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};

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.yaml‎

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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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identifier: nrf54l15dk/nrf54l15/cpuapp/ns
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name: nRF54l15-DK-nRF54l15-Application-Non-Secure
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type: mcu
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arch: arm
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toolchain:
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- gnuarmemb
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- xtools
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- zephyr
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ram: 256
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flash: 1524
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supported:
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- adc
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- gpio
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- i2c
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- spi
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- counter
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- watchdog
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- adc
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- i2s

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns_defconfig‎

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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable hardware stack protection
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
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# Enable TrustZone-M
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CONFIG_ARM_TRUSTZONE_M=y
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# This Board implies building Non-Secure firmware
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CONFIG_TRUSTED_EXECUTION_NONSECURE=y
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# Don't enable the cache in the non-secure image as it is a
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# secure-only peripheral on 54l
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CONFIG_CACHE_MANAGEMENT=n
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CONFIG_EXTERNAL_CACHE=n
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CONFIG_UART_CONSOLE=y
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CONFIG_CONSOLE=y
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CONFIG_SERIAL=y
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# Enable GPIO
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CONFIG_GPIO=y
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# Start SYSCOUNTER on driver init
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CONFIG_NRF_GRTC_START_SYSCOUNTER=y

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