drivers: clock_control: Separated nrf lfclk shim from nrf clock shim.

Separated clock_control_nrf_lfclk shim from clock_control_nrf shim.

Signed-off-by: Michal Frankiewicz <[email protected]>

Author: mif1-nordic

boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi

@@ -96,6 +96,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi

@@ -96,6 +96,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts

@@ -139,3 +139,7 @@
 &xo {
 	status = "okay";
 };
+
+&lfclk {
+	status = "okay";
+};

boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts

@@ -146,3 +146,7 @@
 &xo {
 	status = "okay";
 };
+
+&lfclk {
+	status = "okay";
+};

boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi

@@ -105,6 +105,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &gpregret1 {
 	status = "okay";
 

boards/nordic/nrf54l15dk/pre_dt_board.cmake

@@ -0,0 +1,6 @@
+# Copyright (c) 2025 Nordic Semiconductor
+# SPDX-License-Identifier: Apache-2.0
+
+# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
+# - power@X010e000 & clock@X010e000 & xo@X010e000 & lfclk@X010e000
+list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi

@@ -134,6 +134,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &ieee802154 {
 	status = "okay";
 };

boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi

@@ -95,6 +95,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi

@@ -96,6 +96,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts

@@ -103,6 +103,10 @@
 	status = "okay";
 };
 
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";