[nrf fromlist] soc: nordic: dmm: Fix DMM_REG_ALIGN_SIZE macro when CONFIG_DCACHE=n

Upstream PR #: 80676

Make sure this expansion doesn't include `CONFIG_DCACHE_LINE_SIZE`,
which would be undefined and produce a build error.

Signed-off-by: Grzegorz Swiderski <[email protected]>
(cherry picked from commit 369fb693575c916fc5406e4954262d6687052a5b)

Author: 57300

soc/nordic/common/dmm.h

@@ -33,8 +33,10 @@ extern "C" {
 /* Determine required alignment of the data buffers in specified memory region.
  * Cache line alignment is required if region is cacheable and data cache is enabled.
  */
-#define DMM_REG_ALIGN_SIZE(node_id) \
-	(DMM_IS_REG_CACHEABLE(node_id) ? CONFIG_DCACHE_LINE_SIZE : sizeof(uint8_t))
+#define DMM_REG_ALIGN_SIZE(node_id)							\
+	COND_CODE_1(CONFIG_DCACHE,							\
+	   (DMM_IS_REG_CACHEABLE(node_id) ? CONFIG_DCACHE_LINE_SIZE : sizeof(uint8_t)),	\
+	   (sizeof(uint8_t)))
 
 /* Determine required alignment of the data buffers in memory region
  * associated with specified device node.