[nrf noup] dts: choose a crypto accelerator for entropy

This is a long-term noup patch because crypto driver support is
NCS-only for both cryptocell and CRACEN.

Set HAS_HW_NRF_CC3XX to be defined in NS build when cryptocell
is accessed through the PSA API.
We need to know which CC3XX features are available.

Set PSA as the entropy source for 54L.

PSA is the only NCS-supported interface to CRACEN.

Signed-off-by: Georgios Vasilakis <[email protected]>
Signed-off-by: Joakim Andersson <[email protected]>
Signed-off-by: Dominik Ermel <[email protected]>
Signed-off-by: Sebastian Bøe <[email protected]>
Signed-off-by: Robert Lubos <[email protected]>
Signed-off-by: Rubin Gerritsen <[email protected]>
(cherry picked from commit d1f4662)

Author: joerchan

dts/arm/nordic/nrf52840.dtsi

@@ -8,7 +8,7 @@
 / {
 	chosen {
 		zephyr,bt-hci = &bt_hci_controller;
-		zephyr,entropy = &rng;
+		zephyr,entropy = &cryptocell;
 		zephyr,flash-controller = &flash_controller;
 	};
 
@@ -572,7 +572,7 @@
 			reg = <0x5002a000 0x1000>, <0x5002b000 0x1000>;
 			reg-names = "wrapper", "core";
 			interrupts = <42 NRF_DEFAULT_IRQ_PRIORITY>;
-			status = "disabled";
+			status = "okay";
 		};
 	};
 };

dts/arm/nordic/nrf5340_cpuapp.dtsi

@@ -34,7 +34,7 @@
 	};
 
 	chosen {
-		zephyr,entropy = &rng_hci;
+		zephyr,entropy = &cryptocell;
 		zephyr,flash-controller = &flash_controller;
 	};
 
@@ -104,7 +104,7 @@
 			reg = <0x50844000 0x1000>, <0x50845000 0x1000>;
 			reg-names = "wrapper", "core";
 			interrupts = <68 NRF_DEFAULT_IRQ_PRIORITY>;
-			status = "disabled";
+			status = "okay";
 		};
 	};
 

dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi

@@ -16,7 +16,7 @@ nvic: &cpuapp_nvic {};
 / {
 	chosen {
 		zephyr,bt-hci = &bt_hci_controller;
-		zephyr,entropy = &rng;
+		zephyr,entropy = &psa_rng;
 	};
 
 	soc {
@@ -32,7 +32,7 @@ nvic: &cpuapp_nvic {};
 
 	psa_rng: psa-rng {
 		compatible = "zephyr,psa-crypto-rng";
-		status = "disabled";
+		status = "okay";
 	};
 };
 

dts/arm/nordic/nrf91.dtsi

@@ -28,6 +28,7 @@
 	};
 
 	chosen {
+		zephyr,entropy = &cryptocell;
 		zephyr,flash-controller = &flash_controller;
 	};
 
@@ -51,7 +52,7 @@
 			reg = <0x50840000 0x1000>, <0x50841000 0x1000>;
 			reg-names = "wrapper", "core";
 			interrupts = <64 NRF_DEFAULT_IRQ_PRIORITY>;
-			status = "disabled";
+			status = "okay";
 		};
 
 		ctrlap: ctrlap@50006000 {

soc/nordic/common/Kconfig.peripherals

@@ -13,10 +13,12 @@ config HAS_HW_NRF_BPROT
 	def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_BPROT))
 
 config HAS_HW_NRF_CC310
-	def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_310))
+	def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_310)) || \
+		 ($(dt_nodelabel_enabled,psa_rng) && SOC_SERIES_NRF91X)
 
 config HAS_HW_NRF_CC312
-	def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_312))
+	def_bool $(dt_compat_enabled,$(DT_COMPAT_ARM_CRYPTOCELL_312)) || \
+		 ($(dt_nodelabel_enabled,psa_rng) && SOC_NRF5340_CPUAPP)
 
 config HAS_HW_NRF_CCM
 	def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_CCM))