drivers: clock_control: Separated nrf hfclk shim from nrf clock shim.

Separated clock_control_nrf_hfclk shim from clock_control_nrf shim.

Signed-off-by: Michal Frankiewicz <[email protected]>

Author: mif1-nordic

boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi

@@ -92,6 +92,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi

@@ -92,6 +92,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts

@@ -135,3 +135,7 @@
 &clock {
 	status = "okay";
 };
+
+&xo {
+	status = "okay";
+};

boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts

@@ -142,3 +142,7 @@
 &clock {
 	status = "okay";
 };
+
+&xo {
+	status = "okay";
+};

boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi

@@ -101,6 +101,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &gpregret1 {
 	status = "okay";
 

boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi

@@ -131,6 +131,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &bt_hci_controller {
 	status = "okay";
 };

boards/panasonic/panb511evb/panb511evb_nrf54l15_cpuapp_common.dtsi

@@ -91,6 +91,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi

@@ -92,6 +92,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts

@@ -99,6 +99,10 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 

drivers/clock_control/CMakeLists.txt

@@ -56,6 +56,8 @@ zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HSFLL_LOCAL     clock_cont
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL clock_control_nrf_iron_hsfll_local.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_LFCLK           clock_control_nrf_lfclk.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_AUXPLL          clock_control_nrf_auxpll.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HFCLK           clock_control_nrf_hfclk.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_COMMON          clock_control_nrf_common.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL60X   clock_control_bl60x.c)
 
 if(CONFIG_CLOCK_CONTROL_RENESAS_RZA2M_CPG)
@@ -119,3 +121,5 @@ endif()
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_AST10X0 clock_control_ast10x0.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MAX32 clock_control_max32.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_WCH_RCC clock_control_wch_rcc.c)
+
+zephyr_linker_sources(SECTIONS clock_control_nrf_irq_handlers.ld)