[nrf noup] drivers: pinctrl: rename SDP to HPF

Change name SDP to a new one: HPF.

Signed-off-by: Magdalena Pastula <[email protected]>

Author: magp-nordic

drivers/pinctrl/pinctrl_nrf.c

@@ -112,17 +112,17 @@ static const nrf_gpio_pin_drive_t drive_modes[NRF_DRIVE_COUNT] = {
 #define NRF_PSEL_TDM(reg, line) ((NRF_TDM_Type *)reg)->PSEL.line
 #endif
 
-#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrfe_mspi_controller) || \
-	defined(CONFIG_MSPI_NRFE) || \
+#if DT_HAS_COMPAT_STATUS_OKAY(nordic_hpf_mspi_controller) || \
+	defined(CONFIG_MSPI_HPF) || \
 	DT_ANY_COMPAT_HAS_PROP_STATUS_OKAY(nordic_nrf_vpr_coprocessor, pinctrl_0)
 #if defined(CONFIG_SOC_SERIES_NRF54LX)
-#define NRF_PSEL_SDP_MSPI(psel) \
+#define NRF_PSEL_HPF_MSPI(psel) \
 	nrf_gpio_pin_control_select(psel, NRF_GPIO_PIN_SEL_VPR);
 #elif defined(CONFIG_SOC_SERIES_NRF54HX)
 /* On nRF54H, pin routing is controlled by secure domain, via UICR. */
-#define NRF_PSEL_SDP_MSPI(psel)
+#define NRF_PSEL_HPF_MSPI(psel)
 #endif
-#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrfe_mspi_controller) || ... */
+#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_hpf_mspi_controller) || ... */
 
 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
 			   uintptr_t reg)
@@ -477,26 +477,26 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
 			input = NRF_GPIO_PIN_INPUT_CONNECT;
 			break;
 #endif /* defined(NRF_PSEL_TWIS) */
-#if defined(NRF_PSEL_SDP_MSPI)
-		case NRF_FUN_SDP_MSPI_CS0:
-		case NRF_FUN_SDP_MSPI_CS1:
-		case NRF_FUN_SDP_MSPI_CS2:
-		case NRF_FUN_SDP_MSPI_CS3:
-		case NRF_FUN_SDP_MSPI_CS4:
-		case NRF_FUN_SDP_MSPI_SCK:
-		case NRF_FUN_SDP_MSPI_DQ0:
-		case NRF_FUN_SDP_MSPI_DQ1:
-		case NRF_FUN_SDP_MSPI_DQ2:
-		case NRF_FUN_SDP_MSPI_DQ3:
-		case NRF_FUN_SDP_MSPI_DQ4:
-		case NRF_FUN_SDP_MSPI_DQ5:
-		case NRF_FUN_SDP_MSPI_DQ6:
-		case NRF_FUN_SDP_MSPI_DQ7:
-			NRF_PSEL_SDP_MSPI(psel);
+#if defined(NRF_PSEL_HPF_MSPI)
+		case NRF_FUN_HPF_MSPI_CS0:
+		case NRF_FUN_HPF_MSPI_CS1:
+		case NRF_FUN_HPF_MSPI_CS2:
+		case NRF_FUN_HPF_MSPI_CS3:
+		case NRF_FUN_HPF_MSPI_CS4:
+		case NRF_FUN_HPF_MSPI_SCK:
+		case NRF_FUN_HPF_MSPI_DQ0:
+		case NRF_FUN_HPF_MSPI_DQ1:
+		case NRF_FUN_HPF_MSPI_DQ2:
+		case NRF_FUN_HPF_MSPI_DQ3:
+		case NRF_FUN_HPF_MSPI_DQ4:
+		case NRF_FUN_HPF_MSPI_DQ5:
+		case NRF_FUN_HPF_MSPI_DQ6:
+		case NRF_FUN_HPF_MSPI_DQ7:
+			NRF_PSEL_HPF_MSPI(psel);
 			dir = NRF_GPIO_PIN_DIR_OUTPUT;
 			input = NRF_GPIO_PIN_INPUT_CONNECT;
 			break;
-#endif /* defined(NRF_PSEL_SDP_MSPI) */
+#endif /* defined(NRF_PSEL_HPF_MSPI) */
 		default:
 			return -ENOTSUP;
 		}

include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h

@@ -172,34 +172,34 @@
 #define NRF_FUN_GRTC_CLKOUT_FAST 55U
 /** GRTC slow clock output */
 #define NRF_FUN_GRTC_CLKOUT_32K  56U
-/** SDP_MSPI CK */
-#define NRF_FUN_SDP_MSPI_SCK 57U
-/** SDP_MSPI DQ0 */
-#define NRF_FUN_SDP_MSPI_DQ0 58U
-/** SDP_MSPI DQ1 */
-#define NRF_FUN_SDP_MSPI_DQ1 59U
-/** SDP_MSPI DQ2 */
-#define NRF_FUN_SDP_MSPI_DQ2 60U
-/** SDP_MSPI DQ3 */
-#define NRF_FUN_SDP_MSPI_DQ3 61U
-/** SDP_MSPI DQ4 */
-#define NRF_FUN_SDP_MSPI_DQ4 62U
-/** SDP_MSPI DQ5 */
-#define NRF_FUN_SDP_MSPI_DQ5 63U
-/** SDP_MSPI DQ6 */
-#define NRF_FUN_SDP_MSPI_DQ6 64U
-/** SDP_MSPI DQ7 */
-#define NRF_FUN_SDP_MSPI_DQ7 65U
-/** SDP_MSPI CS0 */
-#define NRF_FUN_SDP_MSPI_CS0 66U
-/** SDP_MSPI CS1 */
-#define NRF_FUN_SDP_MSPI_CS1 67U
-/** SDP_MSPI CS2 */
-#define NRF_FUN_SDP_MSPI_CS2 68U
-/** SDP_MSPI CS3 */
-#define NRF_FUN_SDP_MSPI_CS3 69U
-/** SDP_MSPI CS4 */
-#define NRF_FUN_SDP_MSPI_CS4 70U
+/** HPF_MSPI CK */
+#define NRF_FUN_HPF_MSPI_SCK 57U
+/** HPF_MSPI DQ0 */
+#define NRF_FUN_HPF_MSPI_DQ0 58U
+/** HPF_MSPI DQ1 */
+#define NRF_FUN_HPF_MSPI_DQ1 59U
+/** HPF_MSPI DQ2 */
+#define NRF_FUN_HPF_MSPI_DQ2 60U
+/** HPF_MSPI DQ3 */
+#define NRF_FUN_HPF_MSPI_DQ3 61U
+/** HPF_MSPI DQ4 */
+#define NRF_FUN_HPF_MSPI_DQ4 62U
+/** HPF_MSPI DQ5 */
+#define NRF_FUN_HPF_MSPI_DQ5 63U
+/** HPF_MSPI DQ6 */
+#define NRF_FUN_HPF_MSPI_DQ6 64U
+/** HPF_MSPI DQ7 */
+#define NRF_FUN_HPF_MSPI_DQ7 65U
+/** HPF_MSPI CS0 */
+#define NRF_FUN_HPF_MSPI_CS0 66U
+/** HPF_MSPI CS1 */
+#define NRF_FUN_HPF_MSPI_CS1 67U
+/** HPF_MSPI CS2 */
+#define NRF_FUN_HPF_MSPI_CS2 68U
+/** HPF_MSPI CS3 */
+#define NRF_FUN_HPF_MSPI_CS3 69U
+/** HPF_MSPI CS4 */
+#define NRF_FUN_HPF_MSPI_CS4 70U
 /** TDM SCK in master mode */
 #define NRF_FUN_TDM_SCK_M        71U
 /** TDM SCK in slave mode */