[nrf noup] dts: Select SoftDevice Controller on nRF54L09

The SDC HCI controller is defined as a device tree node.
A node representing the SDC controller is added and selected as the
default over the open source link layer. This is consistent with other
SoCs.

Signed-off-by: Rafał Kuźnia <[email protected]>
(cherry picked from commit da86248)
(cherry picked from commit e40f531)

Author: e-rk

boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi

@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* This file is common to the secure and non-secure domain */
+
+#include <nordic/nrf54l09_enga_cpuapp.dtsi>
+#include "nrf54l09pdk_nrf54l09-common.dtsi"
+
+/ {
+	chosen {
+		zephyr,console = &uart20;
+		zephyr,shell-uart = &uart20;
+		zephyr,uart-mcumgr = &uart20;
+		zephyr,bt-mon-uart = &uart20;
+		zephyr,bt-c2h-uart = &uart20;
+		zephyr,flash-controller = &rram_controller;
+		zephyr,flash = &cpuapp_rram;
+		zephyr,bt-hci = &bt_hci_sdc;
+		zephyr,ieee802154 = &ieee802154;
+	};
+};
+
+&cpuapp_sram {
+	status = "okay";
+};
+
+&hfpll {
+	/* For now use 64 MHz clock for CPU and fast peripherals. */
+	clock-frequency = <DT_FREQ_M(64)>;
+};
+
+&lfxo {
+	load-capacitors = "internal";
+	load-capacitance-femtofarad = <15500>;
+};
+
+&hfxo {
+	load-capacitors = "internal";
+	load-capacitance-femtofarad = <15000>;
+};
+
+&grtc {
+	owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
+	/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
+	child-owned-channels = <3 4 7 8 9 10 11>;
+	status = "okay";
+};
+
+&cpuapp_rram {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x0 DT_SIZE_K(64)>;
+		};
+
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x10000 DT_SIZE_K(212)>;
+		};
+
+		slot0_ns_partition: partition@45000 {
+			label = "image-0-nonsecure";
+			reg = <0x45000 DT_SIZE_K(212)>;
+		};
+
+		slot1_partition: partition@7a000 {
+			label = "image-1";
+			reg = <0x7a000 DT_SIZE_K(212)>;
+		};
+
+		slot1_ns_partition: partition@af000 {
+			label = "image-1-nonsecure";
+			reg = <0xaf000 DT_SIZE_K(212)>;
+		};
+
+		storage_partition: partition@e4000 {
+			label = "storage";
+			reg = <0xe4000 DT_SIZE_K(36)>;
+		};
+	};
+};
+
+&uart20 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpiote20 {
+	status = "okay";
+};
+
+&gpiote30 {
+	status = "okay";
+};
+
+&radio {
+	status = "okay";
+};
+
+&temp {
+	status = "okay";
+};
+
+&clock {
+	status = "okay";
+};
+
+&bt_hci_sdc {
+	status = "okay";
+};
+
+&ieee802154 {
+	status = "okay";
+};

dts/arm/nordic/nrf54l09_enga_cpuapp.dtsi

@@ -17,7 +17,7 @@ nvic: &cpuapp_nvic {};
 
 / {
 	chosen {
-		zephyr,bt-hci = &bt_hci_controller;
+		zephyr,bt-hci = &bt_hci_sdc;
 		zephyr,entropy = &prng;
 	};
 
@@ -38,7 +38,7 @@ nvic: &cpuapp_nvic {};
 	};
 };
 
-&bt_hci_controller {
+&bt_hci_sdc {
 	status = "okay";
 };