[nrf fromtree] boards: nordic: nrf54l10: Change to use common dts partitioning file

Adds a common vendor dts file specifying the default partition
layout for nRF54L10-based cpuapp board targets and updates boards
to use this common file. This also drops the secure/non-secure split
in the partitioning as this was reducing NVM storage that is not
used by this board target and fixes the wrong flash field in
twister yaml files

Signed-off-by: Jamie McCrae <[email protected]>
(cherry picked from commit 9dc6040)

Author: nordicjm

boards/ezurio/bl54l15_dvk/bl54l15_dvk_nrf54l10_cpuapp.dts

@@ -26,49 +26,5 @@
 	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
 };
 
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(1022)>;
-};
-
-/* These partition sizes assume no FLPR area in RRAM */
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		boot_partition: partition@0 {
-			label = "mcuboot";
-			reg = <0x0 DT_SIZE_K(64)>;
-		};
-
-		slot0_partition: partition@10000 {
-			label = "image-0";
-			reg = <0x10000 DT_SIZE_K(224)>;
-		};
-
-		slot0_ns_partition: partition@48000 {
-			label = "image-0-nonsecure";
-			reg = <0x48000 DT_SIZE_K(224)>;
-		};
-
-		slot1_partition: partition@80000 {
-			label = "image-1";
-			reg = <0x80000 DT_SIZE_K(224)>;
-		};
-
-		slot1_ns_partition: partition@b8000 {
-			label = "image-1-nonsecure";
-			reg = <0xb8000 DT_SIZE_K(224)>;
-		};
-
-		/* 32K from 0xf0000 to 0xf7fff reserved for TF-M partitions */
-
-		storage_partition: partition@f8000 {
-			label = "storage";
-			reg = <0xf8000 DT_SIZE_K(28)>;
-		};
-
-		/* 2K from 0xff000 to 0xff7ff unused */
-	};
-};
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l10_partition.dtsi>

boards/ezurio/bl54l15_dvk/bl54l15_dvk_nrf54l10_cpuapp.yaml

@@ -11,7 +11,7 @@ toolchain:
   - zephyr
 sysbuild: true
 ram: 192
-flash: 230
+flash: 1012
 supported:
   - adc
   - counter

boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts

@@ -25,49 +25,5 @@
 	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
 };
 
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(1022)>;
-};
-
-/* These partition sizes assume no FLPR area in RRAM */
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		boot_partition: partition@0 {
-			label = "mcuboot";
-			reg = <0x0 DT_SIZE_K(64)>;
-		};
-
-		slot0_partition: partition@10000 {
-			label = "image-0";
-			reg = <0x10000 DT_SIZE_K(224)>;
-		};
-
-		slot0_ns_partition: partition@48000 {
-			label = "image-0-nonsecure";
-			reg = <0x48000 DT_SIZE_K(224)>;
-		};
-
-		slot1_partition: partition@80000 {
-			label = "image-1";
-			reg = <0x80000 DT_SIZE_K(224)>;
-		};
-
-		slot1_ns_partition: partition@b8000 {
-			label = "image-1-nonsecure";
-			reg = <0xb8000 DT_SIZE_K(224)>;
-		};
-
-		/* 32K from 0xf0000 to 0xf7fff reserved for TF-M partitions */
-
-		storage_partition: partition@f8000 {
-			label = "storage";
-			reg = <0xf8000 DT_SIZE_K(28)>;
-		};
-
-		/* 2K from 0xff000 to 0xff7ff unused */
-	};
-};
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l10_partition.dtsi>

boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml

@@ -10,7 +10,7 @@ toolchain:
   - zephyr
 sysbuild: true
 ram: 192
-flash: 230
+flash: 1012
 supported:
   - adc
   - counter

dts/vendor/nordic/nrf54l10_partition.dtsi

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&cpuapp_rram {
+	reg = <0x0 DT_SIZE_K(1012)>;
+};
+
+/* These partition sizes assume no FLPR area in RRAM */
+&cpuapp_rram {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x0 DT_SIZE_K(64)>;
+		};
+
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x10000 DT_SIZE_K(456)>;
+		};
+
+		slot1_partition: partition@82000 {
+			label = "image-1";
+			reg = <0x82000 DT_SIZE_K(456)>;
+		};
+
+		storage_partition: partition@f4000 {
+			label = "storage";
+			reg = <0xf4000 DT_SIZE_K(36)>;
+		};
+	};
+};