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Revert "[nrf fromlist] drivers: spi: nrfx_spim: use dmm"
This reverts commit 88454f2. Signed-off-by: Bjarki Arge Andreasen <[email protected]>
1 parent afb5a6d commit 76d8ba5

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+38
-37
lines changed

1 file changed

+38
-37
lines changed

drivers/spi/spi_nrfx_spim.c

Lines changed: 38 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,6 @@
1616
#ifdef CONFIG_SOC_NRF54H20_GPD
1717
#include <nrf/gpd.h>
1818
#endif
19-
#include <dmm.h>
2019
#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
2120
#include <nrfx_ppi.h>
2221
#endif
@@ -124,6 +123,9 @@ struct spi_nrfx_config {
124123
#endif
125124
uint32_t wake_pin;
126125
nrfx_gpiote_t wake_gpiote;
126+
#ifdef CONFIG_DCACHE
127+
uint32_t mem_attr;
128+
#endif
127129
#ifdef USE_CLOCK_REQUESTS
128130
const struct device *clk_dev;
129131
struct nrf_clock_spec clk_spec;
@@ -132,7 +134,6 @@ struct spi_nrfx_config {
132134
bool cross_domain;
133135
int8_t default_port;
134136
#endif
135-
void *mem_reg;
136137
};
137138

138139
static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context);
@@ -503,6 +504,11 @@ static void transfer_next_chunk(const struct device *dev)
503504
}
504505

505506
memcpy(dev_data->tx_buffer, tx_buf, chunk_len);
507+
#ifdef CONFIG_DCACHE
508+
if (dev_config->mem_attr & DT_MEM_CACHEABLE) {
509+
sys_cache_data_flush_range(dev_data->tx_buffer, chunk_len);
510+
}
511+
#endif
506512
tx_buf = dev_data->tx_buffer;
507513
}
508514

@@ -519,20 +525,10 @@ static void transfer_next_chunk(const struct device *dev)
519525

520526
dev_data->chunk_len = chunk_len;
521527

522-
xfer.tx_length = spi_context_tx_buf_on(ctx) ? chunk_len : 0;
523-
xfer.rx_length = spi_context_rx_buf_on(ctx) ? chunk_len : 0;
524-
525-
error = dmm_buffer_out_prepare(dev_config->mem_reg, tx_buf, xfer.tx_length,
526-
(void **)&xfer.p_tx_buffer);
527-
if (error != 0) {
528-
goto out_alloc_failed;
529-
}
530-
531-
error = dmm_buffer_in_prepare(dev_config->mem_reg, rx_buf, xfer.rx_length,
532-
(void **)&xfer.p_rx_buffer);
533-
if (error != 0) {
534-
goto in_alloc_failed;
535-
}
528+
xfer.p_tx_buffer = tx_buf;
529+
xfer.tx_length = spi_context_tx_buf_on(ctx) ? chunk_len : 0;
530+
xfer.p_rx_buffer = rx_buf;
531+
xfer.rx_length = spi_context_rx_buf_on(ctx) ? chunk_len : 0;
536532

537533
#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
538534
if (xfer.rx_length == 1 && xfer.tx_length <= 1) {
@@ -555,13 +551,6 @@ static void transfer_next_chunk(const struct device *dev)
555551
anomaly_58_workaround_clear(dev_data);
556552
#endif
557553
}
558-
559-
/* On nrfx_spim_xfer() error */
560-
dmm_buffer_in_release(dev_config->mem_reg, rx_buf, xfer.rx_length,
561-
(void **)&xfer.p_rx_buffer);
562-
in_alloc_failed:
563-
dmm_buffer_out_release(dev_config->mem_reg, (void **)&xfer.p_tx_buffer);
564-
out_alloc_failed:
565554
}
566555

567556
finish_transaction(dev, error);
@@ -571,7 +560,9 @@ static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context)
571560
{
572561
const struct device *dev = p_context;
573562
struct spi_nrfx_data *dev_data = dev->data;
563+
#ifdef CONFIG_DCACHE
574564
const struct spi_nrfx_config *dev_config = dev->config;
565+
#endif
575566

576567
if (p_event->type == NRFX_SPIM_EVENT_DONE) {
577568
/* Chunk length is set to 0 when a transaction is aborted
@@ -585,21 +576,15 @@ static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context)
585576
#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
586577
anomaly_58_workaround_clear(dev_data);
587578
#endif
588-
589-
if (spi_context_tx_buf_on(&dev_data->ctx)) {
590-
dmm_buffer_out_release(dev_config->mem_reg,
591-
(void **)p_event->xfer_desc.p_tx_buffer);
592-
}
593-
594-
if (spi_context_rx_buf_on(&dev_data->ctx)) {
595-
dmm_buffer_in_release(dev_config->mem_reg, dev_data->ctx.rx_buf,
596-
dev_data->chunk_len, p_event->xfer_desc.p_rx_buffer);
597-
}
598-
599579
#ifdef SPI_BUFFER_IN_RAM
600580
if (spi_context_rx_buf_on(&dev_data->ctx) &&
601581
p_event->xfer_desc.p_rx_buffer != NULL &&
602582
p_event->xfer_desc.p_rx_buffer != dev_data->ctx.rx_buf) {
583+
#ifdef CONFIG_DCACHE
584+
if (dev_config->mem_attr & DT_MEM_CACHEABLE) {
585+
sys_cache_data_invd_range(dev_data->rx_buffer, dev_data->chunk_len);
586+
}
587+
#endif
603588
(void)memcpy(dev_data->ctx.rx_buf,
604589
dev_data->rx_buffer,
605590
dev_data->chunk_len);
@@ -893,6 +878,8 @@ static int spi_nrfx_deinit(const struct device *dev)
893878
return 0;
894879
}
895880

881+
#define SPIM_MEM_REGION(idx) DT_PHANDLE(SPIM(idx), memory_regions)
882+
896883
#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
897884
IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
898885
(.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
@@ -901,6 +888,13 @@ static int spi_nrfx_deinit(const struct device *dev)
901888
()) \
902889
))
903890

891+
#define SPIM_GET_MEM_ATTR(idx) \
892+
COND_CODE_1(SPIM_HAS_PROP(idx, memory_regions), \
893+
(COND_CODE_1(DT_NODE_HAS_PROP(SPIM_MEM_REGION(idx), zephyr_memory_attr), \
894+
(DT_PROP(SPIM_MEM_REGION(idx), zephyr_memory_attr)), \
895+
(0))), \
896+
(0))
897+
904898
/* Fast instances depend on the global HSFLL clock controller (as they need
905899
* to request the highest frequency from it to operate correctly), so they
906900
* must be initialized after that controller driver, hence the default SPI
@@ -927,10 +921,10 @@ static int spi_nrfx_deinit(const struct device *dev)
927921
IF_ENABLED(SPI_BUFFER_IN_RAM, \
928922
(static uint8_t spim_##idx##_tx_buffer \
929923
[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
930-
DMM_MEMORY_SECTION(SPIM(idx)); \
924+
SPIM_MEMORY_SECTION(idx); \
931925
static uint8_t spim_##idx##_rx_buffer \
932926
[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
933-
DMM_MEMORY_SECTION(SPIM(idx));)) \
927+
SPIM_MEMORY_SECTION(idx);)) \
934928
static struct spi_nrfx_data spi_##idx##_data = { \
935929
IF_ENABLED(CONFIG_MULTITHREADING, \
936930
(SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \
@@ -967,6 +961,8 @@ static int spi_nrfx_deinit(const struct device *dev)
967961
.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios, \
968962
WAKE_PIN_NOT_USED), \
969963
.wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)), \
964+
IF_ENABLED(CONFIG_DCACHE, \
965+
(.mem_attr = SPIM_GET_MEM_ATTR(idx),)) \
970966
IF_ENABLED(USE_CLOCK_REQUESTS, \
971967
(.clk_dev = SPIM_REQUESTS_CLOCK(SPIM(idx)) \
972968
? DEVICE_DT_GET(DT_CLOCKS_CTLR(SPIM(idx))) \
@@ -979,7 +975,6 @@ static int spi_nrfx_deinit(const struct device *dev)
979975
.default_port = \
980976
DT_PROP_OR(DT_PHANDLE(SPIM(idx), \
981977
default_gpio_port), port, -1),)) \
982-
.mem_reg = DMM_DEV_TO_REG(SPIM(idx)), \
983978
}; \
984979
BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \
985980
!(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
@@ -994,6 +989,12 @@ static int spi_nrfx_deinit(const struct device *dev)
994989
POST_KERNEL, SPIM_INIT_PRIORITY(idx), \
995990
&spi_nrfx_driver_api)
996991

992+
#define SPIM_MEMORY_SECTION(idx) \
993+
COND_CODE_1(SPIM_HAS_PROP(idx, memory_regions), \
994+
(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \
995+
SPIM_MEM_REGION(idx)))))), \
996+
())
997+
997998
#define COND_NRF_SPIM_DEVICE(unused, prefix, i, _) \
998999
IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);))
9991000

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