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[nrf fromlist] drivers: pwm: nrfx: adjust PWM driver to fast PWM120
Fast PWM120 instance works with 320MHz clock, thus pwm_nrfx_get_cycles_per_sec needs to be adjusted. Also, it uses cachable RAM, thus sys_cache function needs to be added to flush the cached sequence. Upstream PR #: 80672 Signed-off-by: Michał Stasiak <[email protected]>
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drivers/pwm/pwm_nrfx.c

Lines changed: 24 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,8 @@
1111
#include <hal/nrf_gpio.h>
1212
#include <stdbool.h>
1313
#include <zephyr/linker/devicetree_regions.h>
14+
#include <zephyr/cache.h>
15+
#include <zephyr/mem_mgmt/mem_attr.h>
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1517
#include <zephyr/logging/log.h>
1618

@@ -40,6 +42,9 @@ struct pwm_nrfx_config {
4042
nrfx_pwm_config_t initial_config;
4143
nrf_pwm_sequence_t seq;
4244
const struct pinctrl_dev_config *pcfg;
45+
#ifdef CONFIG_DCACHE
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uint32_t mem_attr;
47+
#endif
4348
};
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4550
struct pwm_nrfx_data {
@@ -129,11 +134,6 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
129134
uint32_t period_cycles, uint32_t pulse_cycles,
130135
pwm_flags_t flags)
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{
132-
/* We assume here that period_cycles will always be 16MHz
133-
* peripheral clock. Since pwm_nrfx_get_cycles_per_sec() function might
134-
* be removed, see ISSUE #6958.
135-
* TODO: Remove this comment when issue has been resolved.
136-
*/
137137
const struct pwm_nrfx_config *config = dev->config;
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struct pwm_nrfx_data *data = dev->data;
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uint16_t compare_value;
@@ -176,6 +176,12 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
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177177
seq_values_ptr_get(dev)[channel] = PWM_NRFX_CH_VALUE(compare_value, inverted);
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179+
#ifdef CONFIG_DCACHE
180+
if (config->mem_attr & DT_MEM_CACHEABLE) {
181+
sys_cache_data_flush_range((void *)config->seq.values.p_raw, config->seq.length);
182+
}
183+
#endif
184+
179185
LOG_DBG("channel %u, pulse %u, period %u, prescaler: %u.",
180186
channel, pulse_cycles, period_cycles, data->prescaler);
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@@ -243,12 +249,11 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
243249
static int pwm_nrfx_get_cycles_per_sec(const struct device *dev, uint32_t channel,
244250
uint64_t *cycles)
245251
{
246-
/* TODO: Since this function might be removed, we will always return
247-
* 16MHz from this function and handle the conversion with prescaler,
248-
* etc, in the pin set function. See issue #6958.
249-
*/
252+
#ifdef CONFIG_NRFX_PWM120
253+
*cycles = 320ul * 1000ul * 1000ul;
254+
#else
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*cycles = 16ul * 1000ul * 1000ul;
251-
256+
#endif
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return 0;
253258
}
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@@ -333,13 +338,19 @@ static int pwm_nrfx_init(const struct device *dev)
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#define PWM(dev_idx) DT_NODELABEL(pwm##dev_idx)
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#define PWM_PROP(dev_idx, prop) DT_PROP(PWM(dev_idx), prop)
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#define PWM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(PWM(idx), prop)
341+
#define PWM_MEM_REGION(idx) DT_PHANDLE(PWM(idx), memory_regions)
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337343
#define PWM_MEMORY_SECTION(idx) \
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COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \
339345
(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \
340-
DT_PHANDLE(PWM(idx), memory_regions)))))), \
346+
PWM_MEM_REGION(idx)))))), \
341347
())
342348

349+
#define PWM_GET_MEM_ATTR(idx) \
350+
COND_CODE_1(PDM_HAS_PROP(idx, memory_regions), \
351+
(COND_CODE_1( DT_NODE_HAS_PROP(PWM_MEM_REGION(idx), zephyr_memory_attr), \
352+
(DT_PROP(PWM_MEM_REGION(idx), zephyr_memory_attr)), (0))),(0))
353+
343354
#define PWM_NRFX_DEVICE(idx) \
344355
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \
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static struct pwm_nrfx_data pwm_nrfx_##idx##_data; \
@@ -362,6 +373,8 @@ static int pwm_nrfx_init(const struct device *dev)
362373
.seq.values.p_raw = pwm_##idx##_seq_values, \
363374
.seq.length = NRF_PWM_CHANNEL_COUNT, \
364375
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(PWM(idx)), \
376+
IF_ENABLED(CONFIG_DCACHE, \
377+
(.mem_attr = PWM_GET_MEM_ATTR(idx),)) \
365378
}; \
366379
static int pwm_nrfx_init##idx(const struct device *dev) \
367380
{ \

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