[nrf fromlist] boards: nordic: add partitions to memory map for nRF9280

- nRF9280 memory_map_iron is missing periphconf_partition, added this
  partition to mram11 at address 0xe60a000.
- Add secure_storage_partition at 0xe60c000 to memory map. This
  partition is devided in two: cpuapp_crypto_partition and
  cpuapp_its_partition, both are 4KB. Those partitions are used
  by gen_uicr.py script to generate the UICR file.

Upstream PR #: 95549

Signed-off-by: Aymen LAOUINI <[email protected]>

Author: ayla-nordicsemi

boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-memory_map.dtsi

@@ -221,4 +221,14 @@
 			reg = <0x680000 DT_SIZE_K(24)>;
 		};
 	};
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		periphconf_partition: partition@60a000 {
+			reg = <0x60a000 DT_SIZE_K(8)>;
+		};
+	};
 };

boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-memory_map_iron.dtsi

@@ -78,5 +78,28 @@
 		storage_partition: partition@600000 {
 			reg = <0x600000 DT_SIZE_K(40)>;
 		};
+
+		periphconf_partition: partition@60a000 {
+			reg = <0x60a000 DT_SIZE_K(8)>;
+		};
+
+		/* 0x60c000 was chosen for secure_storage_partition such that
+		 * it resides in the beginning of MRAM11 in storage partition.
+		 */
+		secure_storage_partition: partition@60c000 {
+			compatible = "fixed-subpartitions";
+			reg = <0x60c000 DT_SIZE_K(8)>;
+			ranges = <0x0 0x60c000 0x2000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			cpuapp_crypto_partition: partition@0 {
+				reg = <0x0 DT_SIZE_K(4)>;
+			};
+
+			cpuapp_its_partition: partition@1000 {
+				reg = <0x1000 DT_SIZE_K(4)>;
+			};
+		};
 	};
 };