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adamkondraciuknordicjm
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[nrf fromtree] drivers: i2s: nrf_tdm: Allow using 8 channels
TDM should have clock divider bypass enabled when calculated clock divider exceeds maximum allowed value which is `CKDIV2`. Signed-off-by: Adam Kondraciuk <[email protected]> (cherry picked from commit 14b7898)
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drivers/i2s/i2s_nrf_tdm.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,10 @@ LOG_MODULE_REGISTER(tdm_nrf, CONFIG_I2S_LOG_LEVEL);
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*/
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#define NRFX_TDM_STATUS_TRANSFER_STOPPED BIT(1)
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33+
/* Maximum clock divider value. Corresponds to CKDIV2. */
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#define NRFX_TDM_MAX_SCK_DIV_VALUE TDM_CONFIG_SCK_DIV_SCKDIV_Max
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#define NRFX_TDM_MAX_MCK_DIV_VALUE TDM_CONFIG_MCK_DIV_DIV_Max
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#define NRFX_TDM_NUM_OF_CHANNELS (TDM_CONFIG_CHANNEL_NUM_NUM_Max + 1)
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#define NRFX_TDM_TX_CHANNELS_MASK \
@@ -814,11 +818,11 @@ static int trigger_start(const struct device *dev)
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nrf_tdm_sck_configure(drv_cfg->p_reg,
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drv_cfg->sck_src == ACLK ? NRF_TDM_SRC_ACLK : NRF_TDM_SRC_PCLK32M,
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false);
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nrfx_cfg->sck_setup > NRFX_TDM_MAX_SCK_DIV_VALUE);
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nrf_tdm_mck_configure(drv_cfg->p_reg,
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drv_cfg->mck_src == ACLK ? NRF_TDM_SRC_ACLK : NRF_TDM_SRC_PCLK32M,
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false);
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nrfx_cfg->mck_setup > NRFX_TDM_MAX_MCK_DIV_VALUE);
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/* If it is required to use certain HF clock, request it to be running
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* first. If not, start the transfer directly.
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*/

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