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| 1 | +/* |
| 2 | + * Copyright (c) 2024 Nordic Semiconductor ASA |
| 3 | + * SPDX-License-Identifier: Apache-2.0 |
| 4 | + */ |
| 5 | + |
| 6 | +#define DT_DRV_COMPAT nordic_nrf_global_hsfll |
| 7 | + |
| 8 | +#include "clock_control_nrf2_common.h" |
| 9 | +#include <zephyr/devicetree.h> |
| 10 | +#include <zephyr/drivers/clock_control/nrf_clock_control.h> |
| 11 | +#include <nrfs_gdfs.h> |
| 12 | + |
| 13 | +#include <zephyr/logging/log.h> |
| 14 | +LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL); |
| 15 | + |
| 16 | +#define GLOBAL_HSFLL_CLOCK_FREQUENCIES \ |
| 17 | + DT_INST_PROP(0, supported_clock_frequencies) |
| 18 | + |
| 19 | +#define GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE \ |
| 20 | + DT_INST_PROP_LEN(0, supported_clock_frequencies) |
| 21 | + |
| 22 | +#define GLOBAL_HSFLL_FREQ_REQ_TIMEOUT \ |
| 23 | + K_MSEC(CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_TIMEOUT_MS) |
| 24 | + |
| 25 | +struct global_hsfll_dev_config { |
| 26 | + uint32_t clock_frequencies[GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE]; |
| 27 | +}; |
| 28 | + |
| 29 | +struct global_hsfll_dev_data { |
| 30 | + STRUCT_CLOCK_CONFIG(global_hsfll, GLOBAL_HSFLL_CLOCK_FREQUENCIES_SIZE) clk_cfg; |
| 31 | + struct k_work evt_work; |
| 32 | + nrfs_gdfs_evt_type_t evt; |
| 33 | + struct k_work_delayable timeout_dwork; |
| 34 | +}; |
| 35 | + |
| 36 | +static uint32_t global_hsfll_get_max_clock_frequency(const struct device *dev) |
| 37 | +{ |
| 38 | + const struct global_hsfll_dev_config *dev_config = dev->config; |
| 39 | + |
| 40 | + return dev_config->clock_frequencies[ARRAY_SIZE(dev_config->clock_frequencies) - 1]; |
| 41 | +} |
| 42 | + |
| 43 | +static struct onoff_manager *global_hsfll_find_mgr(const struct device *dev, |
| 44 | + const struct nrf_clock_spec *spec) |
| 45 | +{ |
| 46 | + struct global_hsfll_dev_data *dev_data = dev->data; |
| 47 | + const struct global_hsfll_dev_config *dev_config = dev->config; |
| 48 | + uint32_t frequency; |
| 49 | + |
| 50 | + if (!spec) { |
| 51 | + return &dev_data->clk_cfg.onoff[0].mgr; |
| 52 | + } |
| 53 | + |
| 54 | + if (spec->accuracy || spec->precision) { |
| 55 | + LOG_ERR("invalid specification of accuracy or precision"); |
| 56 | + return NULL; |
| 57 | + } |
| 58 | + |
| 59 | + frequency = spec->frequency == NRF_CLOCK_CONTROL_FREQUENCY_MAX |
| 60 | + ? global_hsfll_get_max_clock_frequency(dev) |
| 61 | + : spec->frequency; |
| 62 | + |
| 63 | + for (uint8_t i = 0; i < ARRAY_SIZE(dev_config->clock_frequencies); i++) { |
| 64 | + if (dev_config->clock_frequencies[i] < frequency) { |
| 65 | + continue; |
| 66 | + } |
| 67 | + |
| 68 | + return &dev_data->clk_cfg.onoff[i].mgr; |
| 69 | + } |
| 70 | + |
| 71 | + LOG_ERR("invalid frequency"); |
| 72 | + return NULL; |
| 73 | +} |
| 74 | + |
| 75 | +static int api_request_global_hsfll(const struct device *dev, |
| 76 | + const struct nrf_clock_spec *spec, |
| 77 | + struct onoff_client *cli) |
| 78 | +{ |
| 79 | + struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec); |
| 80 | + |
| 81 | + if (mgr) { |
| 82 | + return onoff_request(mgr, cli); |
| 83 | + } |
| 84 | + |
| 85 | + return -EINVAL; |
| 86 | +} |
| 87 | + |
| 88 | +static int api_release_global_hsfll(const struct device *dev, |
| 89 | + const struct nrf_clock_spec *spec) |
| 90 | +{ |
| 91 | + struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec); |
| 92 | + |
| 93 | + if (mgr) { |
| 94 | + return onoff_release(mgr); |
| 95 | + } |
| 96 | + |
| 97 | + return -EINVAL; |
| 98 | +} |
| 99 | + |
| 100 | +static int api_cancel_or_release_global_hsfll(const struct device *dev, |
| 101 | + const struct nrf_clock_spec *spec, |
| 102 | + struct onoff_client *cli) |
| 103 | +{ |
| 104 | + struct onoff_manager *mgr = global_hsfll_find_mgr(dev, spec); |
| 105 | + |
| 106 | + if (mgr) { |
| 107 | + return onoff_cancel_or_release(mgr, cli); |
| 108 | + } |
| 109 | + |
| 110 | + return -EINVAL; |
| 111 | +} |
| 112 | + |
| 113 | +static struct nrf_clock_control_driver_api driver_api = { |
| 114 | + .std_api = { |
| 115 | + .on = api_nosys_on_off, |
| 116 | + .off = api_nosys_on_off, |
| 117 | + }, |
| 118 | + .request = api_request_global_hsfll, |
| 119 | + .release = api_release_global_hsfll, |
| 120 | + .cancel_or_release = api_cancel_or_release_global_hsfll, |
| 121 | +}; |
| 122 | + |
| 123 | +static void global_hsfll_work_handler(struct k_work *work) |
| 124 | +{ |
| 125 | + struct global_hsfll_dev_data *dev_data = |
| 126 | + CONTAINER_OF(work, struct global_hsfll_dev_data, clk_cfg.work); |
| 127 | + uint8_t freq_idx; |
| 128 | + nrfs_err_t err; |
| 129 | + |
| 130 | + freq_idx = clock_config_update_begin(work); |
| 131 | + |
| 132 | + err = nrfs_gdfs_request_freq(freq_idx, dev_data); |
| 133 | + if (err != NRFS_SUCCESS) { |
| 134 | + clock_config_update_end(&dev_data->clk_cfg, -EIO); |
| 135 | + return; |
| 136 | + } |
| 137 | + |
| 138 | + k_work_schedule(&dev_data->timeout_dwork, GLOBAL_HSFLL_FREQ_REQ_TIMEOUT); |
| 139 | +} |
| 140 | + |
| 141 | +static void global_hsfll_evt_handler(struct k_work *work) |
| 142 | +{ |
| 143 | + struct global_hsfll_dev_data *dev_data = |
| 144 | + CONTAINER_OF(work, struct global_hsfll_dev_data, evt_work); |
| 145 | + int rc; |
| 146 | + |
| 147 | + k_work_cancel_delayable(&dev_data->timeout_dwork); |
| 148 | + rc = dev_data->evt == NRFS_GDFS_EVT_FREQ_CONFIRMED ? 0 : -EIO; |
| 149 | + clock_config_update_end(&dev_data->clk_cfg, rc); |
| 150 | +} |
| 151 | + |
| 152 | +static void global_hfsll_nrfs_gdfs_evt_handler(nrfs_gdfs_evt_t const *p_evt, void *context) |
| 153 | +{ |
| 154 | + struct global_hsfll_dev_data *dev_data = context; |
| 155 | + |
| 156 | + if (k_work_is_pending(&dev_data->evt_work)) { |
| 157 | + return; |
| 158 | + } |
| 159 | + |
| 160 | + dev_data->evt = p_evt->type; |
| 161 | + k_work_submit(&dev_data->evt_work); |
| 162 | +} |
| 163 | + |
| 164 | +static void global_hsfll_timeout_handler(struct k_work *work) |
| 165 | +{ |
| 166 | + struct k_work_delayable *dwork = k_work_delayable_from_work(work); |
| 167 | + struct global_hsfll_dev_data *dev_data = |
| 168 | + CONTAINER_OF(dwork, struct global_hsfll_dev_data, timeout_dwork); |
| 169 | + |
| 170 | + clock_config_update_end(&dev_data->clk_cfg, -ETIMEDOUT); |
| 171 | +} |
| 172 | + |
| 173 | +static int global_hfsll_init(const struct device *dev) |
| 174 | +{ |
| 175 | + struct global_hsfll_dev_data *dev_data = dev->data; |
| 176 | + int rc; |
| 177 | + nrfs_err_t err; |
| 178 | + |
| 179 | + rc = clock_config_init(&dev_data->clk_cfg, |
| 180 | + ARRAY_SIZE(dev_data->clk_cfg.onoff), |
| 181 | + global_hsfll_work_handler); |
| 182 | + if (rc < 0) { |
| 183 | + return rc; |
| 184 | + } |
| 185 | + |
| 186 | + k_work_init_delayable(&dev_data->timeout_dwork, global_hsfll_timeout_handler); |
| 187 | + k_work_init(&dev_data->evt_work, global_hsfll_evt_handler); |
| 188 | + |
| 189 | + err = nrfs_gdfs_init(global_hfsll_nrfs_gdfs_evt_handler); |
| 190 | + if (err != NRFS_SUCCESS) { |
| 191 | + return -EIO; |
| 192 | + } |
| 193 | + |
| 194 | + return 0; |
| 195 | +} |
| 196 | + |
| 197 | +static struct global_hsfll_dev_data driver_data; |
| 198 | + |
| 199 | +static const struct global_hsfll_dev_config driver_config = { |
| 200 | + GLOBAL_HSFLL_CLOCK_FREQUENCIES |
| 201 | +}; |
| 202 | + |
| 203 | +DEVICE_DT_INST_DEFINE( |
| 204 | + 0, |
| 205 | + global_hfsll_init, |
| 206 | + NULL, |
| 207 | + &driver_data, |
| 208 | + &driver_config, |
| 209 | + PRE_KERNEL_1, |
| 210 | + CONFIG_CLOCK_CONTROL_INIT_PRIORITY, |
| 211 | + &driver_api |
| 212 | +); |
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