| 
7 | 7 | 
 
  | 
8 | 8 | / {  | 
9 | 9 | 	reserved-memory {  | 
10 |  | -		cpurad_ram0x_region: memory@2f010000 {  | 
 | 10 | +		cpuapp_ram0x_region: memory@2f010000 {  | 
11 | 11 | 			compatible = "nordic,owned-memory";  | 
12 |  | -			reg = <0x2f010000 DT_SIZE_K(4)>;  | 
 | 12 | +			reg = <0x2f010000 DT_SIZE_K(260)>;  | 
13 | 13 | 			status = "disabled";  | 
14 |  | -			nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RWS>;  | 
 | 14 | +			nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;  | 
15 | 15 | 			#address-cells = <1>;  | 
16 | 16 | 			#size-cells = <1>;  | 
17 |  | -			ranges = <0x0 0x2f010000 0x1000>;  | 
 | 17 | +			ranges = <0x0 0x2f010000 0x41000>;  | 
18 | 18 | 
 
  | 
19 |  | -			cpusec_cpurad_ipc_shm: memory@0 {  | 
 | 19 | +			cpusec_cpuapp_ipc_shm: memory@0 {  | 
20 | 20 | 				reg = <0x0 DT_SIZE_K(2)>;  | 
21 | 21 | 			};  | 
22 | 22 | 
 
  | 
23 |  | -			cpurad_cpusec_ipc_shm: memory@800 {  | 
 | 23 | +			cpuapp_cpusec_ipc_shm: memory@800 {  | 
24 | 24 | 				reg = <0x800 DT_SIZE_K(2)>;  | 
25 | 25 | 			};  | 
 | 26 | + | 
 | 27 | +			cpuapp_data: memory@1000 {  | 
 | 28 | +				reg = <0x1000 DT_SIZE_K(256)>;  | 
 | 29 | +			};  | 
26 | 30 | 		};  | 
27 | 31 | 
 
  | 
28 |  | -		cpuapp_ram0x_region: memory@2f011000 {  | 
 | 32 | +		cpurad_ram0x_region: memory@2f051000 {  | 
29 | 33 | 			compatible = "nordic,owned-memory";  | 
30 |  | -			reg = <0x2f010000 DT_SIZE_K(260)>;  | 
 | 34 | +			reg = <0x2f051000 DT_SIZE_K(4)>;  | 
31 | 35 | 			status = "disabled";  | 
32 |  | -			nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;  | 
 | 36 | +			nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RWS>;  | 
33 | 37 | 			#address-cells = <1>;  | 
34 | 38 | 			#size-cells = <1>;  | 
35 |  | -			ranges = <0x0 0x2f011000 0x41000>;  | 
 | 39 | +			ranges = <0x0 0x2f051000 0x1000>;  | 
36 | 40 | 
 
  | 
37 |  | -			cpusec_cpuapp_ipc_shm: memory@0 {  | 
 | 41 | +			cpusec_cpurad_ipc_shm: memory@0 {  | 
38 | 42 | 				reg = <0x0 DT_SIZE_K(2)>;  | 
39 | 43 | 			};  | 
40 | 44 | 
 
  | 
41 |  | -			cpuapp_cpusec_ipc_shm: memory@800 {  | 
 | 45 | +			cpurad_cpusec_ipc_shm: memory@800 {  | 
42 | 46 | 				reg = <0x800 DT_SIZE_K(2)>;  | 
43 | 47 | 			};  | 
44 |  | - | 
45 |  | -			cpuapp_data: memory@1000 {  | 
46 |  | -				reg = <0x1000 DT_SIZE_K(256)>;  | 
47 |  | -			};  | 
48 | 48 | 		};  | 
49 | 49 | 
 
  | 
50 | 50 | 		etr_buf_ram0x_region: memory@2f0be000 {  | 
 | 
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