[nrf fromlist] arch/arm/cortex_m: support for bridge for S2RAM

for case when the zephyr-rtos application is the bootloader and booted
target application had suspended the device, the resume operation would
be initiated by the bootloader which could redirect execution to
the application S2RAM routines directly.
Thanks to that target application would resume using compiled in
S2RAM routines.
Such scheme allows the zephyr-rtos based bootloader to not mock
the application while does S2RAM resume operation.
Therefore no need for keeping compatibility with S2RAM resume
mechanism in application.
No need to enable PM nor PM_S2RAM anymore in the bootloader.

Upstream PR #: 96290

Signed-off-by: Andrzej Puzdrowski <[email protected]>

Author: nvlsianpu

arch/arm/core/cortex_m/CMakeLists.txt

@@ -41,6 +41,7 @@ zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
 zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
 zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
 zephyr_library_sources_ifdef(CONFIG_PM_S2RAM pm_s2ram.c pm_s2ram.S)
+zephyr_library_sources_ifdef(CONFIG_PM_S2RAM_RESUME_INTERMEDIARY pm_s2ram_intermediary.S)
 zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)
 zephyr_library_sources_ifdef(CONFIG_SW_VECTOR_RELAY irq_relay.S)
 

arch/arm/core/cortex_m/pm_s2ram_intermediary.S

@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2025, Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARM Cortex-M suspend-to-RAM resume intermediary code (S2RAM)
+ */
+
+#include <zephyr/toolchain.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/common/pm_s2ram.h>
+
+GTEXT(pm_s2ram_mark_check_and_mediate)
+
+GTEXT(arch_pm_s2ram_resume)
+SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
+	/*
+	 * Check if reset occurred after suspending to RAM.
+	 * Store LR to ensure we can continue boot when we are not suspended
+	 * to RAM. In addition to LR, R0 is pushed too, to ensure "SP mod 8 = 0",
+	 * as stated by ARM rule 6.2.1.2 for AAPCS32.
+	 */
+	push    {r0, lr}
+	bl      pm_s2ram_mark_check_and_mediate
+	pop	{r0, pc}

arch/arm/core/cortex_m/reset.S

@@ -82,7 +82,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
 
 #endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */
 
-#if defined(CONFIG_PM_S2RAM)
+#if defined(CONFIG_PM_S2RAM) || defined(CONFIG_PM_S2RAM_RESUME_INTERMEDIARY)
     /*
      * Temporarily set MSP to interrupt stack so that arch_pm_s2ram_resume can
      * use stack for calling pm_s2ram_mark_check_and_clear.

include/zephyr/arch/common/pm_s2ram.h

@@ -81,6 +81,19 @@ void pm_s2ram_mark_set(void);
  * @retval false if marking is not found which indicates standard boot.
  */
 bool pm_s2ram_mark_check_and_clear(void);
+
+/**
+ * @brief Check suspend-to-RAM marking and does mediation.
+ *
+ * Function does resume mediation if determines resuming after suspend-to-RAM
+ * or return so standard boot will be executed.
+ *
+ * Implementation is up to given application - usually a bootloader. The function is expected
+ * to do mediation needed for resuming the application from S2AM state, which usually means no
+ * return to caller. Usage of this API implementation shall be enabled using
+ * CONFIG_PM_S2RAM_RESUME_INTERMEDIARY.
+ */
+void pm_s2ram_mark_check_and_mediate(void);
 /**
  * @}
  */

subsys/pm/Kconfig

@@ -19,6 +19,16 @@ config PM
 	  power management subsystem of the number of ticks until the next kernel
 	  timer is due to expire.
 
+config PM_S2RAM_RESUME_INTERMEDIARY
+	bool "Resume intermeniary fo Suspend-to-RAM (S2RAM)"
+	depends on ARCH_HAS_SUSPEND_TO_RAM &&! PM_S2RAM
+	depends on CPU_CORTEX_M
+	help
+	  This option enables suspend-to-RAM (S2RAM) resume intermediary support.
+	  It is dedicated for the bootloader use case where the bootloader is the first stage
+	  and its role (in S2RAM flow) is just to mediate in resuming the application from
+	  the suspension.
+
 rsource "policy/Kconfig"
 
 if PM