| 
6 | 6 | 
 
  | 
7 | 7 | #include "nrf54h20dk_nrf54h20_cpuapp.dts"  | 
8 | 8 | 
 
  | 
9 |  | -/delete-node/&cpurad_rx_partitions;  | 
 | 9 | +/* The code partitions are re-defined below, so delete the parent node. */  | 
10 | 10 | /delete-node/&cpuapp_rx_partitions;  | 
11 | 11 | 
 
  | 
 | 12 | +/* No radio support for IRON variant, don't allocate MRAM. */  | 
 | 13 | +/delete-node/&cpurad_rx_partitions;  | 
 | 14 | + | 
 | 15 | +/* All of ram0x goes to cpuapp, delete these nodes to re-define below. */  | 
 | 16 | +/delete-node/&cpuapp_ram0x_region;  | 
 | 17 | +/delete-node/&cpurad_ram0x_region;  | 
 | 18 | + | 
 | 19 | +/* IPC mechanism for IRON variant differs, delete the old node. */  | 
 | 20 | +/delete-node/&cpusec_cpuapp_ipc;  | 
 | 21 | + | 
 | 22 | +/* Update the location of cpusys IPC shared memory */  | 
 | 23 | +/delete-node/&cpuapp_cpusys_ipc_shm;  | 
 | 24 | +/delete-node/&cpusys_cpuapp_ipc_shm;  | 
 | 25 | +/delete-node/&cpurad_cpusys_ipc_shm;  | 
 | 26 | +/delete-node/&cpusys_cpurad_ipc_shm;  | 
 | 27 | + | 
12 | 28 | /* This is not yet an exhaustive memory map, and contain only a minimum required to boot  | 
13 | 29 |  * the application core.  | 
14 | 30 |  */  | 
 | 
21 | 37 | 		#size-cells = <1>;  | 
22 | 38 | 
 
  | 
23 | 39 | 		cpuapp_slot0_partition: partition@2c000 {  | 
24 |  | -			reg = <0x2c000 DT_SIZE_K(480)>;  | 
 | 40 | +			reg = <0x2c000 DT_SIZE_K(736)>;  | 
25 | 41 | 		};  | 
26 | 42 | 
 
  | 
27 |  | -		cpuppr_code_partition: partition@a4000 {  | 
28 |  | -			reg = <0xa4000 DT_SIZE_K(64)>;  | 
 | 43 | +		cpuppr_code_partition: partition@e4000 {  | 
 | 44 | +			reg = <0xe4000 DT_SIZE_K(64)>;  | 
 | 45 | +		};  | 
 | 46 | + | 
 | 47 | +		cpuflpr_code_partition: partition@f4000 {  | 
 | 48 | +			reg = <0xf4000 DT_SIZE_K(48)>;  | 
 | 49 | +		};  | 
 | 50 | +	};  | 
 | 51 | +};  | 
 | 52 | + | 
 | 53 | +/ {  | 
 | 54 | +	reserved-memory {  | 
 | 55 | +		cpuapp_ram0x_region: memory@2f000000 {  | 
 | 56 | +			compatible = "nordic,owned-memory", "fixed-partitions";  | 
 | 57 | +			nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;  | 
 | 58 | +			reg = <0x2f000000 DT_SIZE_K(768)>;  | 
 | 59 | +			status = "disabled";  | 
 | 60 | +			#address-cells = <1>;  | 
 | 61 | +			#size-cells = <1>;  | 
 | 62 | +			ranges = <0x0 0x2f000000 0xc0000>;  | 
 | 63 | +			cpuapp_data: memory@0{  | 
 | 64 | +				reg = <0x0 DT_SIZE_K(768)>;  | 
 | 65 | +			};  | 
29 | 66 | 		};  | 
30 | 67 | 
 
  | 
31 |  | -		cpuflpr_code_partition: partition@b4000 {  | 
32 |  | -			reg = <0xb4000 DT_SIZE_K(48)>;  | 
 | 68 | +		sysctrl_rom_report: memory@2f88ff00 {  | 
 | 69 | +			reg = <0x2f88ff00 0x100>;  | 
33 | 70 | 		};  | 
 | 71 | + | 
 | 72 | +		cpuapp_ironside_se_boot_report: memory@2f88fd00 {  | 
 | 73 | +			reg = <0x2f88fd00 0x200>;  | 
 | 74 | +		};  | 
 | 75 | + | 
 | 76 | +		cpuapp_cpusys_ipc_shm: memory@2f88f600 {  | 
 | 77 | +			reg = <0x2f88f600 0x80>;  | 
 | 78 | +		};  | 
 | 79 | + | 
 | 80 | +		cpusys_cpuapp_ipc_shm: memory@2f88f680 {  | 
 | 81 | +			reg = <0x2f88f680 0x80>;  | 
 | 82 | +		};  | 
 | 83 | + | 
 | 84 | +		cpurad_cpusys_ipc_shm: memory@2f88f700 {  | 
 | 85 | +			reg = <0x2f88f700 0x80>;  | 
 | 86 | +		};  | 
 | 87 | + | 
 | 88 | +		cpusys_cpurad_ipc_shm: memory@2f88f780 {  | 
 | 89 | +			reg = <0x2f88f780 0x80>;  | 
 | 90 | +		};  | 
 | 91 | + | 
34 | 92 | 	};  | 
35 | 93 | };  | 
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