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cvinayaknordicjm
cvinayak
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[nrf fromtree] Bluetooth: Controller: nRF54L: Fix to improve decryption speed
Fix to improve decryption speed. Decryption starts after payload reception, hence use fastest mode to decrypt PDUs. nRF54Lx only supports decryption after payload reception, this implementation was already there in the code. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]> (cherry picked from commit 9b26e96) Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
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+65
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‎subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c‎

Lines changed: 50 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -2114,10 +2114,14 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
21142114
NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Disabled;
21152115
NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled;
21162116

2117-
mode = (CCM_MODE_MODE_Decryption << CCM_MODE_MODE_Pos) &
2117+
/* Select the CCM decryption mode for the SoC */
2118+
#if defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
2119+
/* NOTE: Use fast decryption as rx data is decrypt after payload is received, compared to
2120+
* decrypting in parallel with radio reception of address in nRF51/nRF52/nRF53.
2121+
*/
2122+
mode = (CCM_MODE_MODE_FastDecryption << CCM_MODE_MODE_Pos) &
21182123
CCM_MODE_MODE_Msk;
21192124

2120-
#if defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
21212125
/* Enable CCM Protocol Mode Bluetooth LE */
21222126
mode |= (CCM_MODE_PROTOCOL_Ble << CCM_MODE_PROTOCOL_Pos) &
21232127
CCM_MODE_PROTOCOL_Msk;
@@ -2126,21 +2130,30 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
21262130
mode |= (CCM_MODE_MACLEN_M4 << CCM_MODE_MACLEN_Pos) &
21272131
CCM_MODE_MACLEN_Msk;
21282132

2129-
#elif !defined(CONFIG_SOC_SERIES_NRF51X)
2133+
#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
2134+
mode = (CCM_MODE_MODE_Decryption << CCM_MODE_MODE_Pos) &
2135+
CCM_MODE_MODE_Msk;
2136+
21302137
/* Enable CCM support for 8-bit length field PDUs. */
21312138
mode |= (CCM_MODE_LENGTH_Extended << CCM_MODE_LENGTH_Pos) &
21322139
CCM_MODE_LENGTH_Msk;
2133-
#endif /* !CONFIG_SOC_SERIES_NRF51X */
2140+
2141+
#elif defined(CONFIG_SOC_SERIES_NRF51X)
2142+
mode = (CCM_MODE_MODE_Decryption << CCM_MODE_MODE_Pos) &
2143+
CCM_MODE_MODE_Msk;
2144+
2145+
#else
2146+
#error "H/w accelerated decryption unsupported."
2147+
#endif
21342148

21352149
/* Select CCM data rate based on current PHY in use. */
21362150
switch (phy) {
21372151
default:
21382152
case PHY_1M:
2139-
#if !defined(CONFIG_SOC_SERIES_NRF51X)
2140-
mode |= (CCM_MODE_DATARATE_1Mbit <<
2141-
CCM_MODE_DATARATE_Pos) &
2153+
#if !defined(CONFIG_SOC_SERIES_NRF51X) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
2154+
mode |= (CCM_MODE_DATARATE_1Mbit << CCM_MODE_DATARATE_Pos) &
21422155
CCM_MODE_DATARATE_Msk;
2143-
#endif /* !CONFIG_SOC_SERIES_NRF51X */
2156+
#endif /* !CONFIG_SOC_SERIES_NRF51X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
21442157

21452158
if (false) {
21462159

@@ -2163,11 +2176,10 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
21632176
break;
21642177

21652178
case PHY_2M:
2166-
#if !defined(CONFIG_SOC_SERIES_NRF51X)
2167-
mode |= (CCM_MODE_DATARATE_2Mbit <<
2168-
CCM_MODE_DATARATE_Pos) &
2179+
#if !defined(CONFIG_SOC_SERIES_NRF51X) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
2180+
mode |= (CCM_MODE_DATARATE_2Mbit << CCM_MODE_DATARATE_Pos) &
21692181
CCM_MODE_DATARATE_Msk;
2170-
#endif /* !CONFIG_SOC_SERIES_NRF51X */
2182+
#endif /* !CONFIG_SOC_SERIES_NRF51X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
21712183

21722184
hal_trigger_crypt_ppi_config();
21732185
hal_radio_nrf_ppi_channels_enable(BIT(HAL_TRIGGER_CRYPT_PPI));
@@ -2177,9 +2189,10 @@ static void *radio_ccm_ext_rx_pkt_set(struct ccm *cnf, uint8_t phy, uint8_t pdu_
21772189
#if defined(CONFIG_BT_CTLR_PHY_CODED)
21782190
#if defined(CONFIG_HAS_HW_NRF_RADIO_BLE_CODED)
21792191
case PHY_CODED:
2180-
mode |= (CCM_MODE_DATARATE_125Kbps <<
2181-
CCM_MODE_DATARATE_Pos) &
2192+
#if !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
2193+
mode |= (CCM_MODE_DATARATE_125Kbps << CCM_MODE_DATARATE_Pos) &
21822194
CCM_MODE_DATARATE_Msk;
2195+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF54LX */
21832196

21842197
NRF_CCM->RATEOVERRIDE =
21852198
(CCM_RATEOVERRIDE_RATEOVERRIDE_500Kbps <<
@@ -2346,22 +2359,11 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
23462359
NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Disabled;
23472360
NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled;
23482361

2362+
/* Select the CCM encryption mode for the SoC */
2363+
#if defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
23492364
mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos) &
23502365
CCM_MODE_MODE_Msk;
23512366

2352-
#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) || \
2353-
defined(CONFIG_SOC_COMPATIBLE_NRF53X)
2354-
/* Enable CCM support for 8-bit length field PDUs. */
2355-
mode |= (CCM_MODE_LENGTH_Extended << CCM_MODE_LENGTH_Pos) &
2356-
CCM_MODE_LENGTH_Msk;
2357-
2358-
/* NOTE: use fastest data rate as tx data needs to be prepared before
2359-
* radio Tx on any PHY.
2360-
*/
2361-
mode |= (CCM_MODE_DATARATE_2Mbit << CCM_MODE_DATARATE_Pos) &
2362-
CCM_MODE_DATARATE_Msk;
2363-
2364-
#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
23652367
/* Enable CCM Protocol Mode Bluetooth LE */
23662368
mode |= (CCM_MODE_PROTOCOL_Ble << CCM_MODE_PROTOCOL_Pos) &
23672369
CCM_MODE_PROTOCOL_Msk;
@@ -2375,6 +2377,27 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
23752377
/* Enable CCM MAC Length 4 bytes */
23762378
mode |= (CCM_MODE_MACLEN_M4 << CCM_MODE_MACLEN_Pos) &
23772379
CCM_MODE_MACLEN_Msk;
2380+
2381+
#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
2382+
mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos) &
2383+
CCM_MODE_MODE_Msk;
2384+
2385+
/* Enable CCM support for 8-bit length field PDUs. */
2386+
mode |= (CCM_MODE_LENGTH_Extended << CCM_MODE_LENGTH_Pos) &
2387+
CCM_MODE_LENGTH_Msk;
2388+
2389+
/* NOTE: use fastest data rate as tx data needs to be prepared before
2390+
* radio Tx on any PHY.
2391+
*/
2392+
mode |= (CCM_MODE_DATARATE_2Mbit << CCM_MODE_DATARATE_Pos) &
2393+
CCM_MODE_DATARATE_Msk;
2394+
2395+
#elif defined(CONFIG_SOC_SERIES_NRF51X)
2396+
mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos) &
2397+
CCM_MODE_MODE_Msk;
2398+
2399+
#else
2400+
#error "H/w accelerated encryption unsupported."
23782401
#endif
23792402

23802403
NRF_CCM->MODE = mode;

‎subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_dppi.h‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -106,17 +106,17 @@ static inline void hal_event_timer_start_ppi_config(void)
106106
nrf_grtc_publish_set(NRF_GRTC, HAL_CNTR_GRTC_EVENT_COMPARE_RADIO,
107107
HAL_EVENT_TIMER_START_PPI);
108108

109-
/* Enable same DPPI in Peripheral domain */
110-
nrf_dppi_channels_enable(NRF_DPPIC20,
111-
BIT(HAL_EVENT_TIMER_START_PPI));
109+
/* Setup PPIB receive publish */
110+
nrf_ppib_publish_set(NRF_PPIB11, HAL_PPIB_RECEIVE_EVENT_TIMER_START_PPI,
111+
HAL_EVENT_TIMER_START_PPI);
112112

113113
/* Setup PPIB send subscribe */
114114
nrf_ppib_subscribe_set(NRF_PPIB21, HAL_PPIB_SEND_EVENT_TIMER_START_PPI,
115115
HAL_EVENT_TIMER_START_PPI);
116116

117-
/* Setup PPIB receive publish */
118-
nrf_ppib_publish_set(NRF_PPIB11, HAL_PPIB_RECEIVE_EVENT_TIMER_START_PPI,
119-
HAL_EVENT_TIMER_START_PPI);
117+
/* Enable same DPPI in Peripheral domain */
118+
nrf_dppi_channels_enable(NRF_DPPIC20,
119+
BIT(HAL_EVENT_TIMER_START_PPI));
120120

121121
#else /* !CONFIG_BT_CTLR_NRF_GRTC */
122122
nrf_rtc_publish_set(NRF_RTC, NRF_RTC_EVENT_COMPARE_2, HAL_EVENT_TIMER_START_PPI);
@@ -148,22 +148,22 @@ static inline void hal_radio_ready_time_capture_ppi_config(void)
148148
*/
149149
static inline void hal_trigger_crypt_ppi_config(void)
150150
{
151+
#if defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
152+
nrf_radio_publish_set(NRF_RADIO, NRF_RADIO_EVENT_PAYLOAD, HAL_TRIGGER_CRYPT_PPI);
151153
nrf_ccm_subscribe_set(NRF_CCM, NRF_CCM_TASK_START, HAL_TRIGGER_CRYPT_PPI);
152154

153-
#if !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
154-
nrf_radio_publish_set(NRF_RADIO, NRF_RADIO_EVENT_ADDRESS, HAL_TRIGGER_CRYPT_PPI);
155+
/* Setup PPIB receive publish */
156+
nrf_ppib_publish_set(NRF_PPIB00, HAL_PPIB_RECEIVE_TRIGGER_CRYPT_PPI, HAL_TRIGGER_CRYPT_PPI);
155157

156-
#else /* !CONFIG_SOC_COMPATIBLE_NRF54LX */
157-
nrf_radio_publish_set(NRF_RADIO, NRF_RADIO_EVENT_PAYLOAD, HAL_TRIGGER_CRYPT_PPI);
158+
/* Setup PPIB send subscribe */
159+
nrf_ppib_subscribe_set(NRF_PPIB10, HAL_PPIB_SEND_TRIGGER_CRYPT_PPI, HAL_TRIGGER_CRYPT_PPI);
158160

159161
/* Enable same DPPI in MCU domain */
160162
nrf_dppi_channels_enable(NRF_DPPIC00, BIT(HAL_TRIGGER_CRYPT_PPI));
161163

162-
/* Setup PPIB send subscribe */
163-
nrf_ppib_subscribe_set(NRF_PPIB10, HAL_PPIB_SEND_TRIGGER_CRYPT_PPI, HAL_TRIGGER_CRYPT_PPI);
164-
165-
/* Setup PPIB receive publish */
166-
nrf_ppib_publish_set(NRF_PPIB00, HAL_PPIB_RECEIVE_TRIGGER_CRYPT_PPI, HAL_TRIGGER_CRYPT_PPI);
164+
#else /* !CONFIG_SOC_COMPATIBLE_NRF54LX */
165+
nrf_radio_publish_set(NRF_RADIO, NRF_RADIO_EVENT_ADDRESS, HAL_TRIGGER_CRYPT_PPI);
166+
nrf_ccm_subscribe_set(NRF_CCM, NRF_CCM_TASK_START, HAL_TRIGGER_CRYPT_PPI);
167167
#endif /* !CONFIG_SOC_COMPATIBLE_NRF54LX */
168168
}
169169

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