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[nrf fromlist] drivers: pwm: pwm_nrfx: Align anomaly 109 handling mechanism
Align anomaly 109 handling to changes in nrfx_pwm driver. Upstream PR #: 96843 Signed-off-by: Michał Bainczyk <[email protected]>
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drivers/pwm/pwm_nrfx.c

Lines changed: 38 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -22,17 +22,6 @@
2222

2323
LOG_MODULE_REGISTER(pwm_nrfx, CONFIG_PWM_LOG_LEVEL);
2424

25-
#if NRF_ERRATA_STATIC_CHECK(52, 109)
26-
#define ANOMALY_109_EGU_IRQ_CONNECT(idx) _EGU_IRQ_CONNECT(idx)
27-
#define _EGU_IRQ_CONNECT(idx) \
28-
extern void nrfx_egu_##idx##_irq_handler(void); \
29-
IRQ_CONNECT(DT_IRQN(DT_NODELABEL(egu##idx)), \
30-
DT_IRQ(DT_NODELABEL(egu##idx), priority), \
31-
nrfx_isr, nrfx_egu_##idx##_irq_handler, 0)
32-
#else
33-
#define ANOMALY_109_EGU_IRQ_CONNECT(idx)
34-
#endif
35-
3625
#define PWM_NRFX_IS_FAST(inst) NRF_DT_IS_FAST(DT_DRV_INST(inst))
3726

3827
#if NRF_DT_INST_ANY_IS_FAST
@@ -78,6 +67,42 @@ struct pwm_nrfx_data {
7867
bool clock_requested;
7968
#endif
8069
};
70+
71+
#if NRF_ERRATA_STATIC_CHECK(52, 109)
72+
/* Forward-declare pwm_nrfx_<inst>_data structs to be able to access nrfx_pwm_t needed for the
73+
* workaround.
74+
*/
75+
#define _PWM_DATA_STRUCT_NAME_GET(inst) pwm_nrfx_##inst##_data
76+
#define _PWM_DATA_STRUCT_DECLARE(inst) static struct pwm_nrfx_data _PWM_DATA_STRUCT_NAME_GET(inst);
77+
DT_INST_FOREACH_STATUS_OKAY(_PWM_DATA_STRUCT_DECLARE);
78+
79+
/* Create an array of pointers to all active PWM instances to loop over them in an EGU interrupt
80+
* handler.
81+
*/
82+
#define _PWM_DATA_STRUCT_PWM_PTR_COMMA_GET(inst) &_PWM_DATA_STRUCT_NAME_GET(inst).pwm,
83+
static nrfx_pwm_t *pwm_instances[] = {
84+
DT_INST_FOREACH_STATUS_OKAY(_PWM_DATA_STRUCT_PWM_PTR_COMMA_GET)
85+
};
86+
87+
/* Define an interrupt handler for the EGU instance used by the workaround which calls
88+
* nrfx_pwm_nrf52_anomaly_109_handler for all active PWM instances.
89+
*/
90+
void anomaly_109_egu_handler(void)
91+
{
92+
for (int i = 0; i < ARRAY_SIZE(pwm_instances); i++) {
93+
nrfx_pwm_nrf52_anomaly_109_handler(pwm_instances[i]);
94+
}
95+
}
96+
97+
#define ANOMALY_109_EGU_IRQ_CONNECT(idx) _EGU_IRQ_CONNECT(idx)
98+
#define _EGU_IRQ_CONNECT(idx) \
99+
IRQ_CONNECT(DT_IRQN(DT_NODELABEL(egu##idx)), \
100+
DT_IRQ(DT_NODELABEL(egu##idx), priority), \
101+
anomaly_109_egu_handler, 0, 0)
102+
#else
103+
#define ANOMALY_109_EGU_IRQ_CONNECT(idx)
104+
#endif
105+
81106
/* Ensure the pwm_needed bit mask can accommodate all available channels. */
82107
#if (NRF_PWM_CHANNEL_COUNT > 8)
83108
#error "Current implementation supports maximum 8 channels."
@@ -102,9 +127,9 @@ static uint16_t *seq_values_ptr_get(const struct device *dev)
102127
return (uint16_t *)config->seq.values.p_raw;
103128
}
104129

105-
static void pwm_handler(nrfx_pwm_event_type_t event_type, void *p_context)
130+
static void pwm_handler(nrfx_pwm_event_t event, void *p_context)
106131
{
107-
ARG_UNUSED(event_type);
132+
ARG_UNUSED(event);
108133
ARG_UNUSED(p_context);
109134
}
110135

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