[nrf noup] dts: copy all nrf54h overlay files with iron variants

Ref: NCSDK-32229
Signed-off-by: Håkon Amundsen <[email protected]>

Author: hakonfam

boards/shields/nrf7002eb/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Only GPIOs 1..11 are supported for PORT1 in nRF54H20DK board, for now
+ * remove this as Wi-Fi SR co-existence is not yet supported on this board.
+ * The external SR RF switch may not even be present on this board.
+ */
+&nrf70 {
+	/delete-property/ srrf-switch-gpios;
+};

samples/application_development/code_relocation_nocopy/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,17 @@
+&cpuapp_ram0x_region {
+	nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWXS>;
+};
+
+&xip_region {
+	status = "okay";
+	nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RX>;
+};
+
+&mx25uw63 {
+	read-command = <0xEC13>;
+	command-length = "INSTR_2_BYTE";
+	address-length = "ADDR_4_BYTE";
+	rx-dummy = <20>;
+
+	xip-config = <1 0 0x20000000 0>;
+};

samples/basic/blinky_pwm/sysbuild/vpr_launcher/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,4 @@
+&pwm130 {
+	status = "reserved";
+	interrupt-parent = <&cpuppr_clic>;
+};

samples/basic/fade_led/sysbuild/vpr_launcher/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,4 @@
+&pwm130 {
+	status = "reserved";
+	interrupt-parent = <&cpuppr_clic>;
+};

samples/boards/nordic/coresight_stm/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&cpuppr_vpr {
+	status = "okay";
+};
+
+&cpuppr_ram3x_region {
+	status = "okay";
+};
+
+&cpuflpr_vpr {
+	status = "okay";
+};

samples/boards/nordic/spis_wakeup/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		led = &led0;
+		spis = &spi130;
+		/delete-property/ led1;
+		/delete-property/ sw0;
+		/delete-property/ sw1;
+		/delete-property/ sw2;
+		/delete-property/ sw3;
+	};
+	/delete-node/ buttons;
+};
+
+/delete-node/ &led1;
+
+&exmif {
+	status = "disabled";
+};
+
+&gpiote130 {
+	status = "okay";
+	owned-channels = <0>;
+};
+
+&pinctrl {
+	spi130_default_alt: spi130_default_alt {
+		group1 {
+			psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
+				<NRF_PSEL(SPIS_MOSI, 0, 6)>,
+				<NRF_PSEL(SPIS_MISO, 0, 8)>,
+				<NRF_PSEL(SPIS_CSN, 0, 10)>;
+		};
+	};
+
+	spi130_sleep_alt: spi130_sleep_alt {
+		group1 {
+			psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
+				<NRF_PSEL(SPIS_MOSI, 0, 6)>,
+				<NRF_PSEL(SPIS_MISO, 0, 8)>,
+				<NRF_PSEL(SPIS_CSN, 0, 10)>;
+			low-power-enable;
+		};
+	};
+};
+
+&spi130 {
+	compatible = "nordic,nrf-spis";
+	status = "okay";
+	def-char = <0x00>;
+	pinctrl-0 = <&spi130_default_alt>;
+	pinctrl-1 = <&spi130_sleep_alt>;
+	pinctrl-names = "default", "sleep";
+	wake-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+	memory-regions = <&cpuapp_dma_region>;
+	/delete-property/rx-delay-supported;
+	/delete-property/rx-delay;
+};
+
+&uart136 {
+	zephyr,pm-device-runtime-auto;
+};

samples/drivers/adc/adc_dt/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ */
+
+#include "nrf54h20dk_nrf54h20_common.dtsi"

samples/drivers/adc/adc_dt/sysbuild/vpr_launcher/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include "../../../boards/nrf54h20dk_nrf54h20_common.dtsi"
+
+&adc {
+	status = "reserved";
+	interrupt-parent = <&cpuppr_clic>;
+};

samples/drivers/adc/adc_sequence/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,62 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ */
+
+/ {
+	aliases {
+		adc0 = &adc;
+	};
+};
+
+/ {
+	zephyr,user {
+		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 7>;
+	};
+};
+
+&adc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1_2";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <NRF_SAADC_AIN1>; /* P1.01 */
+		zephyr,resolution = <10>;
+	};
+
+	channel@1 {
+		reg = <1>;
+		zephyr,gain = "ADC_GAIN_1_2";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <NRF_SAADC_AIN2>; /* P1.02 */
+		zephyr,resolution = <12>;
+		zephyr,oversampling = <8>;
+	};
+
+	channel@2 {
+		reg = <2>;
+		zephyr,gain = "ADC_GAIN_1_2";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <NRF_SAADC_AIN9>; /* P9.01 */
+		zephyr,vref-mv = <3686>; /* 3.6V * 1024 */
+		zephyr,resolution = <12>;
+		zephyr,oversampling = <8>;
+	};
+
+	channel@7 {
+		reg = <7>;
+		zephyr,gain = "ADC_GAIN_1_2";
+		zephyr,reference = "ADC_REF_INTERNAL";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,input-positive = <NRF_SAADC_AIN3>; /* P1.03 */
+		zephyr,input-negative = <NRF_SAADC_AIN7>; /* P1.07 */
+		zephyr,resolution = <12>;
+	};
+};

samples/drivers/i2c/rtio_loopback/boards/nrf54h20dk_nrf54h20_cpuapp_iron.overlay

@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * SDA = P2.8 and P2.9
+ * SCL = P1.2 and P1.3
+ */
+
+/ {
+	aliases {
+		i2c-controller = &i2c130;
+		i2c-controller-target = &i2c131;
+	};
+};
+
+&pinctrl {
+	i2c130_default: i2c130_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 2, 8)>,
+				<NRF_PSEL(TWIM_SCL, 1, 2)>;
+			bias-pull-up;
+		};
+	};
+
+	i2c130_sleep: i2c130_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 2, 8)>,
+				<NRF_PSEL(TWIM_SCL, 1, 2)>;
+			low-power-enable;
+		};
+	};
+
+	i2c131_default: i2c131_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 2, 9)>,
+				<NRF_PSEL(TWIM_SCL, 1, 3)>;
+			bias-pull-up;
+		};
+	};
+
+	i2c131_sleep: i2c131_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 2, 9)>,
+				<NRF_PSEL(TWIM_SCL, 1, 3)>;
+			low-power-enable;
+		};
+	};
+};
+
+&i2c130 {
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c130_default>;
+	pinctrl-1 = <&i2c130_sleep>;
+	pinctrl-names = "default", "sleep";
+	zephyr,concat-buf-size = <256>;
+	memory-regions = <&cpuapp_dma_region>;
+	status = "okay";
+};
+
+&i2c131 {
+	compatible = "nordic,nrf-twis";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c131_default>;
+	pinctrl-1 = <&i2c131_sleep>;
+	pinctrl-names = "default", "sleep";
+	memory-regions = <&cpuapp_dma_region>;
+	status = "okay";
+};