@@ -296,17 +296,17 @@ static inline int qspi_get_lines_read(uint8_t lines)
296296 return ret ;
297297}
298298
299- nrfx_err_t _nrfx_qspi_read (void * p_rx_buffer , size_t rx_buffer_length , uint32_t src_address )
299+ int _nrfx_qspi_read (void * p_rx_buffer , size_t rx_buffer_length , uint32_t src_address )
300300{
301301 return nrfx_qspi_read (p_rx_buffer , rx_buffer_length , src_address );
302302}
303303
304- nrfx_err_t _nrfx_qspi_write (void const * p_tx_buffer , size_t tx_buffer_length , uint32_t dst_address )
304+ int _nrfx_qspi_write (void const * p_tx_buffer , size_t tx_buffer_length , uint32_t dst_address )
305305{
306306 return nrfx_qspi_write (p_tx_buffer , tx_buffer_length , dst_address );
307307}
308308
309- nrfx_err_t _nrfx_qspi_init (nrfx_qspi_config_t const * p_config , nrfx_qspi_handler_t handler ,
309+ int _nrfx_qspi_init (nrfx_qspi_config_t const * p_config , nrfx_qspi_handler_t handler ,
310310 void * p_context )
311311{
312312 NRF_QSPI_Type * p_reg = NRF_QSPI ;
@@ -319,7 +319,7 @@ nrfx_err_t _nrfx_qspi_init(nrfx_qspi_config_t const *p_config, nrfx_qspi_handler
319319 /* LOG_DBG("%04x : IFTIMING", p_reg->IFTIMING & qspi_cfg->RDC4IO); */
320320
321321 /* ACTIVATE task fails for slave bitfile so ignore it */
322- return NRFX_SUCCESS ;
322+ return 0 ;
323323}
324324
325325
@@ -339,32 +339,6 @@ NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(QSPI_IF_BUS_NODE);
339339
340340IF_ENABLED (CONFIG_PINCTRL , (PINCTRL_DT_DEFINE (QSPI_IF_BUS_NODE )));
341341
342- /**
343- * @brief Converts NRFX return codes to the zephyr ones
344- */
345- static inline int qspi_get_zephyr_ret_code (nrfx_err_t res )
346- {
347- switch (res ) {
348- case NRFX_SUCCESS :
349- return 0 ;
350- case NRFX_ERROR_INVALID_PARAM :
351- case NRFX_ERROR_INVALID_ADDR :
352- return - EINVAL ;
353- case NRFX_ERROR_INVALID_STATE :
354- return - ECANCELED ;
355- #if NRF53_ERRATA_159_ENABLE_WORKAROUND
356- case NRFX_ERROR_FORBIDDEN :
357- LOG_ERR ("nRF5340 anomaly 159 conditions detected" );
358- LOG_ERR ("Set the CPU clock to 64 MHz before starting QSPI operation" );
359- return - ECANCELED ;
360- #endif
361- case NRFX_ERROR_BUSY :
362- case NRFX_ERROR_TIMEOUT :
363- default :
364- return - EBUSY ;
365- }
366- }
367-
368342static inline struct qspi_nor_data * get_dev_data (const struct device * dev )
369343{
370344 return dev -> data ;
@@ -431,11 +405,11 @@ static inline void qspi_trans_unlock(const struct device *dev)
431405#endif /* CONFIG_MULTITHREADING */
432406}
433407
434- static inline void qspi_wait_for_completion (const struct device * dev , nrfx_err_t res )
408+ static inline void qspi_wait_for_completion (const struct device * dev , int res )
435409{
436410 struct qspi_nor_data * dev_data = get_dev_data (dev );
437411
438- if (res == NRFX_SUCCESS ) {
412+ if (res == 0 ) {
439413#ifdef CONFIG_MULTITHREADING
440414 k_sem_take (& dev_data -> sync , K_FOREVER );
441415#else /* CONFIG_MULTITHREADING */
@@ -469,7 +443,7 @@ static inline void _qspi_complete(struct qspi_nor_data *dev_data)
469443
470444 qspi_complete (dev_data );
471445}
472- static inline void _qspi_wait_for_completion (const struct device * dev , nrfx_err_t res )
446+ static inline void _qspi_wait_for_completion (const struct device * dev , int res )
473447{
474448 if (!qspi_cfg -> easydma ) {
475449 return ;
@@ -499,7 +473,6 @@ static bool qspi_initialized;
499473static int qspi_device_init (const struct device * dev )
500474{
501475 struct qspi_nor_data * dev_data = get_dev_data (dev );
502- nrfx_err_t res ;
503476 int ret = 0 ;
504477
505478 if (!IS_ENABLED (CONFIG_NRF70_QSPI_LOW_POWER )) {
@@ -517,8 +490,7 @@ static int qspi_device_init(const struct device *dev)
517490#endif
518491
519492 if (!qspi_initialized ) {
520- res = nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
521- ret = qspi_get_zephyr_ret_code (res );
493+ ret = nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
522494 NRF_QSPI -> IFTIMING |= qspi_cfg -> RDC4IO ;
523495 qspi_initialized = (ret == 0 );
524496 }
@@ -543,7 +515,7 @@ static void _qspi_device_uninit(const struct device *dev)
543515#endif
544516
545517 if (last ) {
546- while (nrfx_qspi_mem_busy_check () != NRFX_SUCCESS ) {
518+ while (nrfx_qspi_mem_busy_check () != 0 ) {
547519 if (IS_ENABLED (CONFIG_MULTITHREADING )) {
548520 k_msleep (50 );
549521 } else {
@@ -632,7 +604,7 @@ static int qspi_send_cmd(const struct device *dev, const struct qspi_cmd *cmd, b
632604 int res = nrfx_qspi_cinstr_xfer (& cinstr_cfg , tx_buf , rx_buf );
633605
634606 qspi_unlock (dev );
635- return qspi_get_zephyr_ret_code ( res );
607+ return res
636608}
637609
638610/* RDSR wrapper. Negative value is error. */
@@ -740,16 +712,13 @@ static int qspi_nrfx_configure(const struct device *dev)
740712 k_busy_wait (BASE_CLOCK_SWITCH_DELAY_US );
741713#endif
742714
743- nrfx_err_t res = _nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
715+ int ret = _nrfx_qspi_init (& QSPIconfig , qspi_handler , dev_data );
744716
745717#if defined(CONFIG_SOC_SERIES_NRF53X )
746718 /* Restore the default /4 divider after the QSPI initialization. */
747719 nrf_clock_hfclk192m_div_set (NRF_CLOCK , NRF_CLOCK_HFCLK_DIV_4 );
748720 k_busy_wait (BASE_CLOCK_SWITCH_DELAY_US );
749721#endif
750-
751- int ret = qspi_get_zephyr_ret_code (res );
752-
753722 if (ret == 0 ) {
754723 /* Set QE to match transfer mode. If not using quad
755724 * it's OK to leave QE set, but doing so prevents use
@@ -806,7 +775,7 @@ static int qspi_nrfx_configure(const struct device *dev)
806775 return ret ;
807776}
808777
809- static inline nrfx_err_t read_non_aligned (const struct device * dev , int addr , void * dest ,
778+ static inline int read_non_aligned (const struct device * dev , int addr , void * dest ,
810779 size_t size )
811780{
812781 uint8_t __aligned (WORD_SIZE ) buf [WORD_SIZE * 2 ];
@@ -833,15 +802,15 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
833802 flash_suffix = size - flash_prefix - flash_middle ;
834803 }
835804
836- nrfx_err_t res = NRFX_SUCCESS ;
805+ int res = 0 ;
837806
838807 /* read from aligned flash to aligned memory */
839808 if (flash_middle != 0 ) {
840809 res = _nrfx_qspi_read (dptr + dest_prefix , flash_middle , addr + flash_prefix );
841810
842811 _qspi_wait_for_completion (dev , res );
843812
844- if (res != NRFX_SUCCESS ) {
813+ if (res != 0 ) {
845814 return res ;
846815 }
847816
@@ -857,7 +826,7 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
857826
858827 _qspi_wait_for_completion (dev , res );
859828
860- if (res != NRFX_SUCCESS ) {
829+ if (res != 0 ) {
861830 return res ;
862831 }
863832
@@ -870,7 +839,7 @@ static inline nrfx_err_t read_non_aligned(const struct device *dev, int addr, vo
870839
871840 _qspi_wait_for_completion (dev , res );
872841
873- if (res != NRFX_SUCCESS ) {
842+ if (res != 0 ) {
874843 return res ;
875844 }
876845
@@ -891,39 +860,36 @@ static int qspi_nor_read(const struct device *dev, int addr, void *dest, size_t
891860 return 0 ;
892861 }
893862
894- int rc = qspi_device_init (dev );
863+ int ret = qspi_device_init (dev );
895864
896- if (rc != 0 ) {
865+ if (ret != 0 ) {
897866 goto out ;
898867 }
899868
900869 qspi_lock (dev );
901870
902- nrfx_err_t res = read_non_aligned (dev , addr , dest , size );
871+ int ret = read_non_aligned (dev , addr , dest , size );
903872
904873 qspi_unlock (dev );
905-
906- rc = qspi_get_zephyr_ret_code (res );
907-
908874out :
909875 qspi_device_uninit (dev );
910- return rc ;
876+ return ret ;
911877}
912878
913879/* addr aligned, sptr not null, slen less than 4 */
914- static inline nrfx_err_t write_sub_word (const struct device * dev , int addr , const void * sptr ,
880+ static inline int write_sub_word (const struct device * dev , int addr , const void * sptr ,
915881 size_t slen )
916882{
917883 uint8_t __aligned (4 ) buf [4 ];
918- nrfx_err_t res ;
884+ int res ;
919885
920886 /* read out the whole word so that unchanged data can be
921887 * written back
922888 */
923889 res = _nrfx_qspi_read (buf , sizeof (buf ), addr );
924890 _qspi_wait_for_completion (dev , res );
925891
926- if (res == NRFX_SUCCESS ) {
892+ if (res == 0 ) {
927893 memcpy (buf , sptr , slen );
928894 res = _nrfx_qspi_write (buf , sizeof (buf ), addr );
929895 _qspi_wait_for_completion (dev , res );
@@ -948,11 +914,9 @@ static int qspi_nor_write(const struct device *dev, int addr, const void *src, s
948914 return - EINVAL ;
949915 }
950916
951- nrfx_err_t res = NRFX_SUCCESS ;
952-
953- int rc = qspi_device_init (dev );
917+ int res = qspi_device_init (dev );
954918
955- if (rc != 0 ) {
919+ if (res != 0 ) {
956920 goto out ;
957921 }
958922
@@ -970,11 +934,9 @@ static int qspi_nor_write(const struct device *dev, int addr, const void *src, s
970934 qspi_unlock (dev );
971935
972936 qspi_trans_unlock (dev );
973-
974- rc = qspi_get_zephyr_ret_code (res );
975937out :
976938 qspi_device_uninit (dev );
977- return rc ;
939+ return res ;
978940}
979941
980942/**
@@ -1460,7 +1422,7 @@ int qspi_enable_encryption(uint8_t *key)
14601422 memcpy (qspi_cfg -> p_cfg .key , key , 16 );
14611423
14621424 err = nrfx_qspi_dma_encrypt (& qspi_cfg -> p_cfg );
1463- if (err != NRFX_SUCCESS ) {
1425+ if (err != 0 ) {
14641426 LOG_ERR ("nrfx_qspi_dma_encrypt failed: %d" , err );
14651427 return - EIO ;
14661428 }
0 commit comments