[nrf fromlist] drivers: firmware: nrf_ironside: add IRONside CPUCONF service

Upstream PR #: 89333

Add an IPC service API for booting local domain cores.

Signed-off-by: Sebastian Bøe <[email protected]>

Author: SebastianBoe

drivers/firmware/nrf_ironside/CMakeLists.txt

@@ -4,3 +4,5 @@
 zephyr_library()
 
 zephyr_library_sources_ifdef(CONFIG_NRF_IRONSIDE_CALL call.c)
+
+zephyr_library_sources_ifdef(CONFIG_NRF_IRONSIDE_CPUCONF_SERVICE cpuconf.c)

drivers/firmware/nrf_ironside/Kconfig

@@ -26,3 +26,15 @@ config NRF_IRONSIDE_CALL_INIT_PRIORITY
 	  but higher than the priority of any feature that selects NRF_IRONSIDE_CALL.
 
 endif # NRF_IRONSIDE_CALL
+
+menu "Nordic IRONside services"
+	depends on SOC_NRF54H20_IRON
+
+config NRF_IRONSIDE_CPUCONF_SERVICE
+	bool "IRONside CPUCONF service"
+	depends on SOC_NRF54H20_CPUAPP
+	select NRF_IRONSIDE_CALL
+	help
+	  Service used to boot local domain cores.
+
+endmenu

drivers/firmware/nrf_ironside/cpuconf.c

@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include <zephyr/sys/util.h>
+#include <zephyr/kernel.h>
+
+#include <zephyr/drivers/firmware/nrf_ironside/call.h>
+#include <zephyr/drivers/firmware/nrf_ironside/cpuconf.h>
+
+int ironside_cpuconf(NRF_PROCESSORID_Type cpu, void *vector_table, bool cpu_wait, uint8_t *msg,
+		     size_t msg_size)
+{
+	int err;
+	struct ironside_call_buf *const buf = ironside_call_alloc();
+
+	buf->id = IRONSIDE_CALL_ID_CPUCONF_V0;
+
+	buf->args[IRONSIDE_CPUCONF_SERVICE_CPU_IDX] = cpu;
+	buf->args[IRONSIDE_CPUCONF_SERVICE_VECTOR_TABLE_IDX] = (uint32_t)vector_table;
+	buf->args[IRONSIDE_CPUCONF_SERVICE_CPU_WAIT_IDX] = cpu_wait;
+	buf->args[IRONSIDE_CPUCONF_SERVICE_MSG_IDX] = (uint32_t)msg;
+	buf->args[IRONSIDE_CPUCONF_SERVICE_MSG_SIZE_IDX] = msg_size;
+
+	ironside_call_dispatch(buf);
+
+	if (buf->status == IRONSIDE_CALL_STATUS_RSP_SUCCESS) {
+		err = buf->args[IRONSIDE_CPUCONF_SERVICE_RETCODE_IDX];
+	} else {
+		err = buf->status;
+	}
+
+	ironside_call_release(buf);
+
+	return err;
+}

include/zephyr/drivers/firmware/nrf_ironside/cpuconf.h

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_
+#define ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_
+
+#include <zephyr/drivers/firmware/nrf_ironside/call.h>
+
+#include <zephyr/toolchain/common.h>
+
+/**
+ * @name CPUCONF service error codes.
+ * @{
+ */
+
+#define IRONSIDE_CPUCONF_ERROR_WRONG_CPU                0x5eb2
+#define IRONSIDE_CPUCONF_ERROR_MEM_ACCESS_NOT_PERMITTED 0x5eb1
+
+/**
+ * @}
+ */
+
+#define IRONSIDE_CALL_ID_CPUCONF_V0 2
+
+enum {
+	IRONSIDE_CPUCONF_SERVICE_CPU_IDX,
+	IRONSIDE_CPUCONF_SERVICE_VECTOR_TABLE_IDX,
+	IRONSIDE_CPUCONF_SERVICE_CPU_WAIT_IDX,
+	IRONSIDE_CPUCONF_SERVICE_MSG_IDX,
+	IRONSIDE_CPUCONF_SERVICE_MSG_SIZE_IDX,
+	/* The last enum value is reserved for the number of arguments */
+	IRONSIDE_CPUCONF_NUM_ARGS
+};
+
+/* IDX 0 is re-used by the error return code and the 'cpu' parameter. */
+#define IRONSIDE_CPUCONF_SERVICE_RETCODE_IDX 0
+
+BUILD_ASSERT(IRONSIDE_CPUCONF_NUM_ARGS <= NRF_IRONSIDE_CALL_NUM_ARGS);
+
+/**
+ * @brief Boot a local domain CPU
+ *
+ * @param cpu The CPU to be booted
+ * @param vector_table Pointer to the vector table used to boot the CPU.
+ * @param cpu_wait When this is true, the CPU will WAIT even if the CPU has clock.
+ * @param msg A message that can be placed in radiocore's boot report.
+ * @param msg_size Size of the message in bytes.
+ *
+ * @note cpu_wait is only intended to be enabled for debug purposes
+ * and it is only supported that a debugger resumes the CPU.
+ *
+ * @retval 0 on success or if the CPU has already booted.
+ * @retval Positive non-0 error status if reported by IRONside call.
+ * @retval -IRONSIDE_CPUCONF_ERROR_WRONG_CPU if cpu is unrecognized
+ * @retval -IRONSIDE_CPUCONF_ERROR_MEM_ACCESS_NOT_PERMITTED
+ * if the CPU does not have read access configured for the vector_table address
+ */
+int ironside_cpuconf(NRF_PROCESSORID_Type cpu, void *vector_table, bool cpu_wait, uint8_t *msg,
+		     size_t msg_size);
+
+#endif /* ZEPHYR_INCLUDE_ZEPHYR_DRIVERS_FIRMWARE_NRF_IRONSIDE_CPUCONF_H_ */