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Merge branch 'nrfconnect:main' into fix-null-pointer-to-strcmp-in-posix-mqueue
2 parents f5a3735 + a676c71 commit b42c619

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boards/nordic/nrf54l09pdk/Kconfig.nrf54l09pdk

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@@ -3,3 +3,4 @@
33

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config BOARD_NRF54L09PDK
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select SOC_NRF54L09_ENGA_CPUAPP if BOARD_NRF54L09PDK_NRF54L09_CPUAPP
6+
select SOC_NRF54L09_ENGA_CPUFLPR if BOARD_NRF54L09PDK_NRF54L09_CPUFLPR
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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4-
board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
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if (CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUAPP)
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board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
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elseif (CONFIG_BOARD_NRF54L09PDK_NRF54L09_CPUFLPR)
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board_runner_args(jlink "--speed=4000")
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endif()
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include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/nordic/nrf54l09pdk/board.yml

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vendor: nordic
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socs:
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- name: nrf54l09
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variants:
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- name: xip
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cpucluster: cpuflpr

boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-common.dtsi

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@@ -60,3 +60,15 @@
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pinctrl-1 = <&uart20_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&uart30 {
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current-speed = <115200>;
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pinctrl-0 = <&uart30_default>;
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pinctrl-1 = <&uart30_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&hfpll {
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/* For now use 64 MHz clock for CPU and fast peripherals. */
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clock-frequency = <DT_FREQ_M(64)>;
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};

boards/nordic/nrf54l09pdk/nrf54l09pdk_nrf54l09-pinctrl.dtsi

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low-power-enable;
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};
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};
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/omit-if-no-ref/ uart30_default: uart30_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 0)>,
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<NRF_PSEL(UART_RTS, 0, 2)>;
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 0, 1)>,
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<NRF_PSEL(UART_CTS, 0, 3)>;
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bias-pull-up;
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};
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};
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/omit-if-no-ref/ uart30_sleep: uart30_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 0)>,
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<NRF_PSEL(UART_RX, 0, 1)>,
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<NRF_PSEL(UART_RTS, 0, 2)>,
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<NRF_PSEL(UART_CTS, 0, 3)>;
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low-power-enable;
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};
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};
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};
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nordic/nrf54l09_enga_cpuflpr.dtsi>
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#include "nrf54l09pdk_nrf54l09-common.dtsi"
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/ {
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model = "Nordic nRF54L09 PDK nRF54L09 FLPR MCU";
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compatible = "nordic,nrf54l09pdk_nrf54l09-cpuflpr";
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chosen {
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zephyr,console = &uart30;
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zephyr,shell-uart = &uart30;
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zephyr,code-partition = &cpuflpr_code_partition;
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zephyr,flash = &cpuflpr_rram;
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zephyr,sram = &cpuflpr_sram;
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};
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};
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&cpuflpr_sram {
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status = "okay";
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};
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&cpuflpr_rram {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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cpuflpr_code_partition: partition@0 {
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label = "image-0";
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reg = <0x0 DT_SIZE_K(60)>;
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};
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};
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};
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&grtc {
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owned-channels = <3 4>;
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status = "okay";
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};
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&uart30 {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpiote20 {
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status = "okay";
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};
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&gpiote30 {
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status = "okay";
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};
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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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identifier: nrf54l09pdk/nrf54l09/cpuflpr
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name: nRF54L09-PDK-nRF54L09-Fast-Lightweight-Peripheral-Processor
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type: mcu
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arch: riscv
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toolchain:
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- zephyr
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ram: 48
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flash: 60
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supported:
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- counter
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- gpio
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# Copyright (c) 2025 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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# Enable UART driver
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CONFIG_SERIAL=y
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# Enable console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable GPIO
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CONFIG_GPIO=y
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CONFIG_USE_DT_CODE_PARTITION=y
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# Execute from SRAM
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CONFIG_XIP=n
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CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL=y

boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20_cpuapp.yaml

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supported:
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- adc
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- counter
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- dmic
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- gpio
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- i2c
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- pwm

boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-pinctrl.dtsi

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};
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};
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88-
/omit-if-no-ref/ can120_default: can120_default {
89-
group1 {
90-
psels = <NRF_PSEL(CAN_RX, 9, 4)>,
91-
<NRF_PSEL(CAN_TX, 9, 5)>;
92-
};
93-
};
94-
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/omit-if-no-ref/ pwm130_default: pwm130_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 9, 2)>;

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