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[nrf fromlist] dts: drivers: nordic: Don't manage hsfll120 from drivers
The hsfll120 is requested automatically by hardware. Remove additional handling from device drivers. Updates: - can_nrf - counter_nrfx_timer - uart_nrfx_uarte - spi_nrfx_spim - spi_nrfx_spis Upstream PR #: 97452 Signed-off-by: Bjarki Arge Andreasen <[email protected]>
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16 files changed

+65
-518
lines changed

16 files changed

+65
-518
lines changed

drivers/can/can_nrf.c

Lines changed: 1 addition & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@ struct can_nrf_config {
2929
uint32_t mrba;
3030
uint32_t mram;
3131
const struct device *auxpll;
32-
const struct device *hsfll;
3332
const struct pinctrl_dev_config *pcfg;
3433
void (*irq_configure)(void);
3534
uint16_t irq;
@@ -133,40 +132,16 @@ static const struct can_mcan_ops can_mcan_nrf_ops = {
133132
.clear_mram = can_nrf_clear_mram,
134133
};
135134

136-
static int configure_hsfll(const struct device *dev, bool on)
137-
{
138-
const struct can_mcan_config *mcan_config = dev->config;
139-
const struct can_nrf_config *config = mcan_config->custom;
140-
struct nrf_clock_spec spec = { 0 };
141-
142-
/* If CAN is on, HSFLL frequency >= AUXPLL frequency */
143-
if (on) {
144-
int ret;
145-
146-
ret = clock_control_get_rate(config->auxpll, NULL, &spec.frequency);
147-
if (ret < 0) {
148-
return ret;
149-
}
150-
}
151-
152-
return nrf_clock_control_request_sync(config->hsfll, &spec, K_FOREVER);
153-
}
154-
155135
static int can_nrf_init(const struct device *dev)
156136
{
157137
const struct can_mcan_config *mcan_config = dev->config;
158138
const struct can_nrf_config *config = mcan_config->custom;
159139
int ret;
160140

161-
if (!device_is_ready(config->auxpll) || !device_is_ready(config->hsfll)) {
141+
if (!device_is_ready(config->auxpll)) {
162142
return -ENODEV;
163143
}
164144

165-
ret = configure_hsfll(dev, true);
166-
if (ret < 0) {
167-
return ret;
168-
}
169-
170145
ret = nrf_clock_control_request_sync(config->auxpll, NULL, K_FOREVER);
171146
if (ret < 0) {
172147
return ret;
@@ -215,7 +190,6 @@ static int can_nrf_init(const struct device *dev)
215190
.mram = CAN_MCAN_DT_INST_MRAM_ADDR(n), \
216191
.auxpll = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(n, auxpll)), \
217192
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
218-
.hsfll = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(n, hsfll)), \
219193
.irq = DT_INST_IRQN(n), \
220194
.irq_configure = can_nrf_irq_configure##n, \
221195
}; \

drivers/counter/counter_nrfx_timer.c

Lines changed: 1 addition & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@
55
*/
66
#include <soc.h>
77
#include <zephyr/drivers/counter.h>
8-
#include <zephyr/drivers/clock_control/nrf_clock_control.h>
98
#include <zephyr/devicetree.h>
109
#include <hal/nrf_timer.h>
1110
#include <zephyr/sys/atomic.h>
@@ -35,21 +34,11 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME, LOG_LEVEL);
3534
#define MAYBE_CONST_CONFIG const
3635
#endif
3736

38-
#if NRF_DT_INST_ANY_IS_FAST && CONFIG_CLOCK_CONTROL
39-
#define COUNTER_IS_FAST(idx) NRF_DT_INST_IS_FAST(idx)
40-
#define COUNTER_ANY_FAST
41-
#else
42-
#define COUNTER_IS_FAST(idx) 0
43-
#endif
44-
4537
struct counter_nrfx_data {
4638
counter_top_callback_t top_cb;
4739
void *top_user_data;
4840
uint32_t guard_period;
4941
atomic_t cc_int_pending;
50-
#ifdef COUNTER_ANY_FAST
51-
atomic_t active;
52-
#endif
5342
};
5443

5544
struct counter_nrfx_ch_data {
@@ -61,10 +50,6 @@ struct counter_nrfx_config {
6150
struct counter_config_info info;
6251
struct counter_nrfx_ch_data *ch_data;
6352
NRF_TIMER_Type *timer;
64-
#ifdef COUNTER_ANY_FAST
65-
const struct device *clk_dev;
66-
struct nrf_clock_spec clk_spec;
67-
#endif
6853
LOG_INSTANCE_PTR_DECLARE(log);
6954
};
7055

@@ -78,18 +63,6 @@ static int start(const struct device *dev)
7863
{
7964
const struct counter_nrfx_config *config = dev->config;
8065

81-
#ifdef COUNTER_ANY_FAST
82-
struct counter_nrfx_data *data = dev->data;
83-
84-
if (config->clk_dev && atomic_cas(&data->active, 0, 1)) {
85-
int err;
86-
87-
err = nrf_clock_control_request_sync(config->clk_dev, &config->clk_spec, K_FOREVER);
88-
if (err < 0) {
89-
return err;
90-
}
91-
}
92-
#endif
9366
nrf_timer_task_trigger(config->timer, NRF_TIMER_TASK_START);
9467

9568
return 0;
@@ -106,19 +79,6 @@ static int stop(const struct device *dev)
10679
nrf_timer_task_trigger(config->timer, NRF_TIMER_TASK_CLEAR);
10780
#endif
10881

109-
#ifdef COUNTER_ANY_FAST
110-
struct counter_nrfx_data *data = dev->data;
111-
112-
if (config->clk_dev && atomic_cas(&data->active, 1, 0)) {
113-
int err;
114-
115-
err = nrf_clock_control_release(config->clk_dev, &config->clk_spec);
116-
if (err < 0) {
117-
return err;
118-
}
119-
}
120-
#endif
121-
12282
return 0;
12383
}
12484

@@ -459,20 +419,6 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
459419
.set_guard_period = set_guard_period,
460420
};
461421

462-
/* Get initialization level of an instance. Instances that requires clock control
463-
* which is using nrfs (IPC) are initialized later.
464-
*/
465-
#define TIMER_INIT_LEVEL(idx) \
466-
COND_CODE_1(COUNTER_IS_FAST(idx), (POST_KERNEL), (PRE_KERNEL_1))
467-
468-
/* Get initialization priority of an instance. Instances that requires clock control
469-
* which is using nrfs (IPC) are initialized later.
470-
*/
471-
#define TIMER_INIT_PRIO(idx) \
472-
COND_CODE_1(COUNTER_IS_FAST(idx), \
473-
(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
474-
(CONFIG_COUNTER_INIT_PRIORITY))
475-
476422
/*
477423
* Device instantiation is done with node labels due to HAL API
478424
* requirements. In particular, TIMERx_MAX_SIZE values from HALs
@@ -525,22 +471,14 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
525471
}, \
526472
.ch_data = counter##idx##_ch_data, \
527473
.timer = (NRF_TIMER_Type *)DT_INST_REG_ADDR(idx), \
528-
IF_ENABLED(COUNTER_IS_FAST(idx), \
529-
(.clk_dev = DEVICE_DT_GET_OR_NULL(DT_CLOCKS_CTLR(DT_DRV_INST(idx))), \
530-
.clk_spec = { \
531-
.frequency = NRF_PERIPH_GET_FREQUENCY(DT_DRV_INST(idx)), \
532-
.accuracy = 0, \
533-
.precision = NRF_CLOCK_CONTROL_PRECISION_DEFAULT, \
534-
}, \
535-
)) \
536474
LOG_INSTANCE_PTR_INIT(log, LOG_MODULE_NAME, idx) \
537475
}; \
538476
DEVICE_DT_INST_DEFINE(idx, \
539477
counter_##idx##_init, \
540478
NULL, \
541479
&counter_##idx##_data, \
542480
&nrfx_counter_##idx##_config.info, \
543-
TIMER_INIT_LEVEL(idx), TIMER_INIT_PRIO(idx), \
481+
PRE_KERNEL_1, CONFIG_COUNTER_INIT_PRIORITY, \
544482
&counter_nrfx_driver_api);
545483

546484
DT_INST_FOREACH_STATUS_OKAY(COUNTER_NRFX_TIMER_DEVICE)

drivers/pwm/pwm_nrfx.c

Lines changed: 3 additions & 106 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@
1313
#include <zephyr/linker/devicetree_regions.h>
1414
#include <zephyr/cache.h>
1515
#include <zephyr/mem_mgmt/mem_attr.h>
16-
#include <zephyr/drivers/clock_control/nrf_clock_control.h>
1716

1817
#include <zephyr/logging/log.h>
1918

@@ -36,20 +35,6 @@ LOG_MODULE_REGISTER(pwm_nrfx, CONFIG_PWM_LOG_LEVEL);
3635
#define PWM(dev_idx) DT_NODELABEL(pwm##dev_idx)
3736
#define PWM_PROP(dev_idx, prop) DT_PROP(PWM(dev_idx), prop)
3837
#define PWM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(PWM(idx), prop)
39-
#define PWM_NRFX_IS_FAST(idx) NRF_DT_IS_FAST(PWM(idx))
40-
41-
#if NRF_DT_INST_ANY_IS_FAST
42-
#define PWM_NRFX_FAST_PRESENT 1
43-
/* If fast instances are used then system managed device PM cannot be used because
44-
* it may call PM actions from locked context and fast PWM PM actions can only be
45-
* called in a thread context.
46-
*/
47-
BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
48-
#endif
49-
50-
#if defined(PWM_NRFX_FAST_PRESENT) && CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL
51-
#define PWM_NRFX_USE_CLOCK_CONTROL 1
52-
#endif
5338

5439
#define PWM_NRFX_CH_POLARITY_MASK BIT(15)
5540
#define PWM_NRFX_CH_COMPARE_MASK BIT_MASK(15)
@@ -65,10 +50,6 @@ struct pwm_nrfx_config {
6550
#ifdef CONFIG_DCACHE
6651
uint32_t mem_attr;
6752
#endif
68-
#ifdef PWM_NRFX_USE_CLOCK_CONTROL
69-
const struct device *clk_dev;
70-
struct nrf_clock_spec clk_spec;
71-
#endif
7253
};
7354

7455
struct pwm_nrfx_data {
@@ -77,27 +58,12 @@ struct pwm_nrfx_data {
7758
uint8_t pwm_needed;
7859
uint8_t prescaler;
7960
bool stop_requested;
80-
#ifdef PWM_NRFX_USE_CLOCK_CONTROL
81-
bool clock_requested;
82-
#endif
8361
};
8462
/* Ensure the pwm_needed bit mask can accommodate all available channels. */
8563
#if (NRF_PWM_CHANNEL_COUNT > 8)
8664
#error "Current implementation supports maximum 8 channels."
8765
#endif
8866

89-
#ifdef PWM_NRFX_FAST_PRESENT
90-
static bool pwm_is_fast(const struct pwm_nrfx_config *config)
91-
{
92-
return config->clock_freq > MHZ(16);
93-
}
94-
#else
95-
static bool pwm_is_fast(const struct pwm_nrfx_config *config)
96-
{
97-
return false;
98-
}
99-
#endif
100-
10167
static uint16_t *seq_values_ptr_get(const struct device *dev)
10268
{
10369
const struct pwm_nrfx_config *config = dev->config;
@@ -178,21 +144,6 @@ static int stop_pwm(const struct device *dev)
178144
*/
179145
nrfx_pwm_stop(&config->pwm, false);
180146

181-
#if PWM_NRFX_USE_CLOCK_CONTROL
182-
struct pwm_nrfx_data *data = dev->data;
183-
184-
if (data->clock_requested) {
185-
int ret = nrf_clock_control_release(config->clk_dev, &config->clk_spec);
186-
187-
if (ret < 0) {
188-
LOG_ERR("Global HSFLL release failed: %d", ret);
189-
return ret;
190-
}
191-
192-
data->clock_requested = false;
193-
}
194-
#endif
195-
196147
return 0;
197148
}
198149

@@ -232,9 +183,8 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
232183
/* Constantly active (duty 100%). */
233184
/* This value is always greater than or equal to COUNTERTOP. */
234185
compare_value = PWM_NRFX_CH_COMPARE_MASK;
235-
needs_pwm = pwm_is_fast(config) ||
236-
(IS_ENABLED(NRF_PWM_HAS_IDLEOUT) &&
237-
IS_ENABLED(CONFIG_PWM_NRFX_NO_GLITCH_DUTY_100));
186+
needs_pwm = IS_ENABLED(NRF_PWM_HAS_IDLEOUT) &&
187+
IS_ENABLED(CONFIG_PWM_NRFX_NO_GLITCH_DUTY_100);
238188
} else {
239189
/* PWM generation needed. Check if the requested period matches
240190
* the one that is currently set, or the PWM peripheral can be
@@ -290,22 +240,6 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
290240
* registers and drives its outputs accordingly.
291241
*/
292242
if (data->pwm_needed == 0) {
293-
if (pwm_is_fast(config)) {
294-
#if PWM_NRFX_USE_CLOCK_CONTROL
295-
if (data->clock_requested) {
296-
int ret = nrf_clock_control_release(config->clk_dev,
297-
&config->clk_spec);
298-
299-
if (ret < 0) {
300-
LOG_ERR("Global HSFLL release failed: %d", ret);
301-
return ret;
302-
}
303-
304-
data->clock_requested = false;
305-
}
306-
#endif
307-
return 0;
308-
}
309243
int ret = stop_pwm(dev);
310244

311245
if (ret < 0) {
@@ -332,20 +266,6 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel,
332266
* until another playback is requested (new values will be
333267
* loaded then) or the PWM peripheral is stopped.
334268
*/
335-
#if PWM_NRFX_USE_CLOCK_CONTROL
336-
if (config->clk_dev && !data->clock_requested) {
337-
int ret = nrf_clock_control_request_sync(config->clk_dev,
338-
&config->clk_spec,
339-
K_FOREVER);
340-
341-
if (ret < 0) {
342-
LOG_ERR("Global HSFLL request failed: %d", ret);
343-
return ret;
344-
}
345-
346-
data->clock_requested = true;
347-
}
348-
#endif
349269
nrfx_pwm_simple_playback(&config->pwm, &config->seq, 1,
350270
NRFX_PWM_FLAG_NO_EVT_FINISHED);
351271
}
@@ -463,21 +383,6 @@ static int pwm_nrfx_init(const struct device *dev)
463383
COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \
464384
(DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0))
465385

466-
/* Fast instances depend on the global HSFLL clock controller (as they need
467-
* to request the highest frequency from it to operate correctly), so they
468-
* must be initialized after that controller driver, hence the default PWM
469-
* initialization priority may be too early for them.
470-
*/
471-
#if defined(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY) && \
472-
CONFIG_PWM_INIT_PRIORITY < CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY
473-
#define PWM_INIT_PRIORITY(idx) \
474-
COND_CODE_1(PWM_NRFX_IS_FAST(idx), \
475-
(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
476-
(CONFIG_PWM_INIT_PRIORITY))
477-
#else
478-
#define PWM_INIT_PRIORITY(idx) CONFIG_PWM_INIT_PRIORITY
479-
#endif
480-
481386
#define PWM_NRFX_DEVICE(idx) \
482387
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \
483388
NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(PWM(idx)); \
@@ -506,14 +411,6 @@ static int pwm_nrfx_init(const struct device *dev)
506411
(16ul * 1000ul * 1000ul)), \
507412
IF_ENABLED(CONFIG_DCACHE, \
508413
(.mem_attr = PWM_GET_MEM_ATTR(idx),)) \
509-
IF_ENABLED(PWM_NRFX_USE_CLOCK_CONTROL, \
510-
(.clk_dev = PWM_NRFX_IS_FAST(idx) \
511-
? DEVICE_DT_GET(DT_CLOCKS_CTLR(PWM(idx))) \
512-
: NULL, \
513-
.clk_spec = { \
514-
.frequency = \
515-
NRF_PERIPH_GET_FREQUENCY(PWM(idx)), \
516-
},)) \
517414
}; \
518415
static int pwm_nrfx_init##idx(const struct device *dev) \
519416
{ \
@@ -526,7 +423,7 @@ static int pwm_nrfx_init(const struct device *dev)
526423
pwm_nrfx_init##idx, PM_DEVICE_DT_GET(PWM(idx)), \
527424
&pwm_nrfx_##idx##_data, \
528425
&pwm_nrfx_##idx##_config, \
529-
POST_KERNEL, PWM_INIT_PRIORITY(idx), \
426+
POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \
530427
&pwm_nrfx_drv_api_funcs)
531428

532429
#define COND_PWM_NRFX_DEVICE(unused, prefix, i, _) \

drivers/serial/Kconfig.nrfx

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -28,13 +28,6 @@ config UART_NRFX_UARTE
2828
imply NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG if !UART_NRFX_UARTE_LEGACY_SHIM
2929
imply NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG if !UART_NRFX_UARTE_LEGACY_SHIM
3030

31-
config UART_NRFX_UARTE_USE_CLOCK_CONTROL
32-
def_bool y
33-
depends on UART_NRFX_UARTE
34-
depends on $(dt_nodelabel_enabled,uart120)
35-
depends on !SOC_NRF54H20_CPUFLPR && !SOC_NRF54H20_CPUPPR
36-
select CLOCK_CONTROL
37-
3831
config UART_NRFX_UARTE_NO_IRQ
3932
bool "Polling without interrupt"
4033
depends on UART_NRFX_UARTE

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