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include/zephyr/arch/arm/cortex_a_r
subsys/mgmt/mcumgr/grp/os_mgmt/include Expand file tree Collapse file tree 6 files changed +31
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lines changed Original file line number Diff line number Diff line change @@ -93,6 +93,14 @@ config CPU_CORTEX_R7
9393 help
9494 This option signifies the use of a Cortex-R7 CPU
9595
96+ config CPU_CORTEX_R8
97+ bool
98+ select CPU_AARCH32_CORTEX_R
99+ select ARMV7_R
100+ select ARMV7_R_FP if CPU_HAS_FPU
101+ help
102+ This option signifies the use of a Cortex-R8 CPU
103+
96104config CPU_CORTEX_R52
97105 bool
98106 select CPU_AARCH32_CORTEX_R
Original file line number Diff line number Diff line change @@ -68,6 +68,15 @@ if("${ARCH}" STREQUAL "arm")
6868 else ()
6969 set (GCC_M_CPU ${GCC_M_CPU} +nofp)
7070 endif ()
71+ elseif (CONFIG_CPU_CORTEX_R8)
72+ set (GCC_M_CPU cortex-r8)
73+ if (CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
74+ if (NOT CONFIG_VFP_FEATURE_DOUBLE_PRECISION)
75+ set (GCC_M_CPU ${GCC_M_CPU} +nofp.dp)
76+ endif ()
77+ else ()
78+ set (GCC_M_CPU ${GCC_M_CPU} +nofp)
79+ endif ()
7180 elseif (CONFIG_CPU_CORTEX_R52)
7281 set (GCC_M_CPU cortex-r52)
7382 if (CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
Original file line number Diff line number Diff line change @@ -7,7 +7,7 @@ if(CONFIG_FPU)
77
88if ("${ARCH} " STREQUAL "arm" )
99 if (CONFIG_CPU_AARCH32_CORTEX_R)
10- if (CONFIG_CPU_CORTEX_R4 OR CONFIG_CPU_CORTEX_R5) # VFPv3
10+ if (CONFIG_CPU_CORTEX_R4 OR CONFIG_CPU_CORTEX_R5 OR CONFIG_CPU_CORTEX_R8 ) # VFPv3
1111 if (CONFIG_VFP_FEATURE_DOUBLE_PRECISION)
1212 set (GCC_M_FPU vfpv3-d16)
1313 elseif (CONFIG_VFP_FEATURE_SINGLE_PRECISION)
Original file line number Diff line number Diff line change 3232#define MPU_RASR_B_Pos 0
3333#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos)
3434
35- #if defined(CONFIG_CPU_CORTEX_R4 ) || defined(CONFIG_CPU_CORTEX_R5 )
35+ #if defined(CONFIG_CPU_CORTEX_R4 ) || defined(CONFIG_CPU_CORTEX_R5 ) || defined( CONFIG_CPU_CORTEX_R8 )
3636#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U)
3737#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U)
3838#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U)
Original file line number Diff line number Diff line change @@ -46,6 +46,8 @@ extern "C" {
4646#include <core_cr5.h>
4747#elif defined(CONFIG_CPU_CORTEX_R7 )
4848#include <core_cr7.h>
49+ #elif defined(CONFIG_CPU_CORTEX_R8 )
50+ #include <core_cr8.h>
4951#elif defined(CONFIG_CPU_CORTEX_R52 )
5052#include <core_cr52.h>
5153#elif defined(CONFIG_CPU_AARCH32_CORTEX_A )
Original file line number Diff line number Diff line change @@ -83,6 +83,16 @@ extern "C" {
8383#else
8484#define PROCESSOR_NAME "cortex-r7+nofp"
8585#endif
86+ #elif defined(CONFIG_CPU_CORTEX_R8 )
87+ #if defined(CONFIG_FPU ) && defined(CONFIG_CPU_HAS_VFP )
88+ #if !defined(CONFIG_VFP_FEATURE_DOUBLE_PRECISION )
89+ #define PROCESSOR_NAME "cortex-r8+nofp.dp"
90+ #else
91+ #define PROCESSOR_NAME "cortex-r8"
92+ #endif
93+ #else
94+ #define PROCESSOR_NAME "cortex-r8+nofp"
95+ #endif
8696#elif defined(CONFIG_CPU_CORTEX_R52 )
8797#if defined(CONFIG_FPU ) && defined(CONFIG_CPU_HAS_VFP )
8898#if !defined(CONFIG_VFP_FEATURE_DOUBLE_PRECISION )
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