Skip to content

Commit cb667d5

Browse files
57300jonathannilsen
authored and
rlubos
committed
[nrf fromtree] boards: nrf54h20dk: Merge iron variants into the base variants
This replaces the legacy SDFW compatible board configuration with the IronSide SE compatible one, thus removing support for running samples and tests on nRF54H20 devices with the old firmware. All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp` out of the box. For other board targets, all applications are expected to boot, but may require additional peripheral configuration in UICR. Build system support for the new UICR format is to be added separately. Co-authored-by: Jonathan Nilsen <[email protected]> Signed-off-by: Jonathan Nilsen <[email protected]> Signed-off-by: Grzegorz Swiderski <[email protected]> (cherry picked from commit b4c18e8)
1 parent 6207ccf commit cb667d5

38 files changed

+115
-469
lines changed

‎boards/nordic/nrf54h20dk/Kconfig.defconfig

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -12,28 +12,26 @@ config BT_HCI_IPC
1212
config MAX_THREAD_BYTES
1313
default 3 if USERSPACE
1414

15-
endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP
16-
17-
if BOARD_NRF54H20DK_NRF54H20_CPURAD
18-
19-
config MAX_THREAD_BYTES
20-
default 3 if USERSPACE
21-
22-
endif # BOARD_NRF54H20DK_NRF54H20_CPURAD
23-
24-
if BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON
25-
2615
config ROM_START_OFFSET
2716
default 0x800 if BOOTLOADER_MCUBOOT
2817

18+
if !USE_DT_CODE_PARTITION
19+
20+
# Application core firmware must start at this offset when not using MCUboot.
21+
# However, the default 'zephyr,code-partition' in DT is set for MCUboot.
2922
config FLASH_LOAD_OFFSET
30-
default 0x2c000 if !USE_DT_CODE_PARTITION
23+
default $(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition)
3124

32-
endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON
25+
endif # !USE_DT_CODE_PARTITION
3326

34-
if BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON
27+
endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP
28+
29+
if BOARD_NRF54H20DK_NRF54H20_CPURAD
30+
31+
config MAX_THREAD_BYTES
32+
default 3 if USERSPACE
3533

3634
config ROM_START_OFFSET
3735
default 0x800 if BOOTLOADER_MCUBOOT
3836

39-
endif # BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON
37+
endif # BOARD_NRF54H20DK_NRF54H20_CPURAD

‎boards/nordic/nrf54h20dk/Kconfig.nrf54h20dk

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,9 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
config BOARD_NRF54H20DK
5-
select SOC_NRF54H20_CPUAPP if (BOARD_NRF54H20DK_NRF54H20_CPUAPP || \
6-
BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON)
7-
select SOC_NRF54H20_CPURAD if (BOARD_NRF54H20DK_NRF54H20_CPURAD || \
8-
BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)
5+
select SOC_NRF54H20_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPUAPP
6+
select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD
97
select SOC_NRF54H20_CPUPPR if (BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
108
BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP)
119
select SOC_NRF54H20_CPUFLPR if (BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \
1210
BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP)
13-
select SOC_NRF54H20_IRON if (BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON || \
14-
BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)

‎boards/nordic/nrf54h20dk/board.cmake

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2,10 +2,7 @@
22

33
include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
44

5-
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR
6-
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD OR
7-
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON OR
8-
CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)
5+
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD)
96
if(CONFIG_SOC_NRF54H20_CPUAPP)
107
set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuapp.JLinkScript)
118
else()
@@ -17,7 +14,7 @@ if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR
1714
endif()
1815

1916
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUFLPR)
20-
if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR)
17+
if(CONFIG_SOC_NRF54H20_CPUPPR)
2118
set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuppr.JLinkScript)
2219
else()
2320
set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuflpr.JLinkScript)

‎boards/nordic/nrf54h20dk/board.yml

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,6 @@ board:
99
cpucluster: cpuppr
1010
- name: xip
1111
cpucluster: cpuflpr
12-
- name: iron
13-
cpucluster: cpuapp
14-
- name: iron
15-
cpucluster: cpurad
1612
revision:
1713
format: major.minor.patch
1814
default: "0.9.0"

‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7,17 +7,17 @@
77
/ {
88
ipc {
99
cpusec_cpuapp_ipc: ipc-1-2 {
10-
compatible = "zephyr,ipc-icmsg";
10+
compatible = "nordic,ironside-call";
1111
status = "disabled";
12-
dcache-alignment = <32>;
12+
memory-region = <&cpusec_cpuapp_ipc_shm>;
1313
mboxes = <&cpusec_bellboard 12>,
1414
<&cpuapp_bellboard 0>;
1515
};
1616

1717
cpusec_cpurad_ipc: ipc-1-3 {
18-
compatible = "zephyr,ipc-icmsg";
18+
compatible = "nordic,ironside-call";
1919
status = "disabled";
20-
dcache-alignment = <32>;
20+
memory-region = <&cpusec_cpurad_ipc_shm>;
2121
mboxes = <&cpusec_bellboard 18>,
2222
<&cpurad_bellboard 0>;
2323
};

‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf_iron.dtsi

Lines changed: 0 additions & 30 deletions
This file was deleted.

‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi

Lines changed: 48 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -16,14 +16,6 @@
1616
#size-cells = <1>;
1717
ranges = <0x0 0x2f010000 0x41000>;
1818

19-
cpusec_cpuapp_ipc_shm: memory@0 {
20-
reg = <0x0 DT_SIZE_K(2)>;
21-
};
22-
23-
cpuapp_cpusec_ipc_shm: memory@800 {
24-
reg = <0x800 DT_SIZE_K(2)>;
25-
};
26-
2719
cpuapp_data: memory@1000 {
2820
reg = <0x1000 DT_SIZE_K(256)>;
2921
};
@@ -37,14 +29,6 @@
3729
#address-cells = <1>;
3830
#size-cells = <1>;
3931
ranges = <0x0 0x2f051000 0x1000>;
40-
41-
cpusec_cpurad_ipc_shm: memory@0 {
42-
reg = <0x0 DT_SIZE_K(2)>;
43-
};
44-
45-
cpurad_cpusec_ipc_shm: memory@800 {
46-
reg = <0x800 DT_SIZE_K(2)>;
47-
};
4832
};
4933

5034
etr_buf_ram0x_region: memory@2f0be000 {
@@ -81,20 +65,44 @@
8165
};
8266
};
8367

84-
cpuapp_cpusys_ipc_shm: memory@2f88fce0 {
85-
reg = <0x2f88fce0 0x80>;
68+
cpuapp_cpusys_ipc_shm: memory@2f88f600 {
69+
reg = <0x2f88f600 0x80>;
70+
};
71+
72+
cpusys_cpuapp_ipc_shm: memory@2f88f680 {
73+
reg = <0x2f88f680 0x80>;
74+
};
75+
76+
cpurad_cpusys_ipc_shm: memory@2f88f700 {
77+
reg = <0x2f88f700 0x80>;
8678
};
8779

88-
cpusys_cpuapp_ipc_shm: memory@2f88fd60 {
89-
reg = <0x2f88fd60 0x80>;
80+
cpusys_cpurad_ipc_shm: memory@2f88f780 {
81+
reg = <0x2f88f780 0x80>;
9082
};
9183

92-
cpurad_cpusys_ipc_shm: memory@2f88fe00 {
93-
reg = <0x2f88fe00 0x80>;
84+
cpusec_cpurad_ipc_shm: memory@2f88f800 {
85+
reg = <0x2f88f800 0x80>;
9486
};
9587

96-
cpusys_cpurad_ipc_shm: memory@2f88fe80 {
97-
reg = <0x2f88fe80 0x80>;
88+
cpurad_ironside_se_event_report: memory@2f88f880 {
89+
reg = <0x2f88f880 0x100>;
90+
};
91+
92+
cpurad_ironside_se_boot_report: memory@2f88f980 {
93+
reg = <0x2f88f980 0x200>;
94+
};
95+
96+
cpusec_cpuapp_ipc_shm: memory@2f88fb80 {
97+
reg = <0x2f88fb80 0x80>;
98+
};
99+
100+
cpuapp_ironside_se_event_report: memory@2f88fc00 {
101+
reg = <0x2f88fc00 0x100>;
102+
};
103+
104+
cpuapp_ironside_se_boot_report: memory@2f88fd00 {
105+
reg = <0x2f88fd00 0x200>;
98106
};
99107

100108
/*
@@ -187,27 +195,21 @@
187195
};
188196

189197
&mram1x {
190-
cpurad_rx_partitions: cpurad-rx-partitions {
191-
compatible = "nordic,owned-partitions", "fixed-partitions";
192-
status = "disabled";
193-
nordic,access = <NRF_OWNER_ID_RADIOCORE NRF_PERM_RXS>;
198+
partitions {
199+
compatible = "fixed-partitions";
194200
#address-cells = <1>;
195201
#size-cells = <1>;
196202

197-
cpurad_slot0_partition: partition@54000 {
198-
reg = <0x54000 DT_SIZE_K(256)>;
203+
cpuapp_boot_partition: partition@2c000 {
204+
reg = <0x2c000 DT_SIZE_K(64)>;
199205
};
200-
};
201206

202-
cpuapp_rx_partitions: cpuapp-rx-partitions {
203-
compatible = "nordic,owned-partitions", "fixed-partitions";
204-
status = "disabled";
205-
nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RXS>;
206-
#address-cells = <1>;
207-
#size-cells = <1>;
207+
cpuapp_slot0_partition: partition@3c000 {
208+
reg = <0x3c000 DT_SIZE_K(336)>;
209+
};
208210

209-
cpuapp_slot0_partition: partition@94000 {
210-
reg = <0x94000 DT_SIZE_K(320)>;
211+
cpurad_slot0_partition: partition@90000 {
212+
reg = <0x90000 DT_SIZE_K(336)>;
211213
};
212214

213215
cpuppr_code_partition: partition@e4000 {
@@ -217,21 +219,17 @@
217219
cpuflpr_code_partition: partition@f4000 {
218220
reg = <0xf4000 DT_SIZE_K(48)>;
219221
};
220-
};
221222

222-
cpuapp_rw_partitions: cpuapp-rw-partitions {
223-
compatible = "nordic,owned-partitions", "fixed-partitions";
224-
status = "disabled";
225-
nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RWS>;
226-
#address-cells = <1>;
227-
#size-cells = <1>;
223+
cpuapp_slot1_partition: partition@100000 {
224+
reg = <0x100000 DT_SIZE_K(336)>;
225+
};
228226

229-
dfu_partition: partition@100000 {
230-
reg = < 0x100000 DT_SIZE_K(908) >;
227+
cpurad_slot1_partition: partition@154000 {
228+
reg = <0x154000 DT_SIZE_K(336)>;
231229
};
232230

233-
storage_partition: partition@1e3000 {
234-
reg = < 0x1e3000 DT_SIZE_K(40) >;
231+
storage_partition: partition@1a8000 {
232+
reg = <0x1a8000 DT_SIZE_K(40)>;
235233
};
236234
};
237235
};

‎boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map_iron.dtsi

Lines changed: 0 additions & 104 deletions
This file was deleted.

0 commit comments

Comments
 (0)