[nrf fromtree] tests: drivers: ledc_pwm: Add test cases

Add test cases to include coverage for ESP32 HS channels.

Signed-off-by: Raffael Rostagno <[email protected]>
(cherry picked from commit 713375a)

Author: Raffael Rostagno

tests/drivers/pwm/pwm_gpio_loopback/socs/esp32_procpu.overlay

@@ -1,7 +1,7 @@
 /*
  * SPDX-License-Identifier: Apache-2.0
  *
- * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
+ * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
  */
 
 #include <zephyr/dt-bindings/pwm/pwm.h>
@@ -12,18 +12,24 @@
 	zephyr,user {
 		/* GPIO input pins order must match PWM pinctrl config */
 		gpios = <&gpio0 2 ESP32_GPIO_PIN_OUT_EN>,
-			<&gpio0 3 ESP32_GPIO_PIN_OUT_EN>;
+			<&gpio0 3 ESP32_GPIO_PIN_OUT_EN>,
+			<&gpio0 4 ESP32_GPIO_PIN_OUT_EN>,
+			<&gpio0 5 ESP32_GPIO_PIN_OUT_EN>;
 
 		pwms = <&ledc0 0 160000 PWM_POLARITY_NORMAL>,
-			<&ledc0 5 80000 PWM_POLARITY_INVERTED>;
+			<&ledc0 5 80000 PWM_POLARITY_INVERTED>,
+			<&ledc0 9 1000000 PWM_POLARITY_NORMAL>,
+			<&ledc0 10 1000000 PWM_POLARITY_INVERTED>;
 	};
 };
 
 &pinctrl {
 	ledc0_default: ledc0_default {
 		group1 {
 			pinmux = <LEDC_CH0_GPIO2>,
-				<LEDC_CH5_GPIO3>;
+				<LEDC_CH5_GPIO3>,
+				<LEDC_CH9_GPIO4>,
+				<LEDC_CH10_GPIO5>;
 			input-enable;
 		};
 	};
@@ -45,4 +51,16 @@
 		reg = <0x5>;
 		timer = <1>;
 	};
+
+	/* HS channel */
+	channel9@9 {
+		reg = <0x9>;
+		timer = <0>;
+	};
+
+	/* share same timer with ch9 */
+	channel10@a {
+		reg = <0xa>;
+		timer = <0>;
+	};
 };