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20 | 20 | #include <zephyr/logging/log.h> |
21 | 21 | #include <zephyr/cache.h> |
22 | 22 | #include <zephyr/dt-bindings/regulator/nrf5x.h> |
| 23 | +#include <soc/nrfx_coredep.h> |
| 24 | +#include <nrf_erratas.h> |
| 25 | +#include <system_nrf54l.h> |
| 26 | +#include <zephyr/drivers/clock_control/nrf_clock_control.h> |
| 27 | +LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); |
| 28 | + |
| 29 | +#if defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) |
23 | 30 |
|
24 | | -#if defined(NRF_APPLICATION) |
25 | 31 | #include <cmsis_core.h> |
26 | 32 | #include <hal/nrf_glitchdet.h> |
27 | 33 | #include <hal/nrf_oscillators.h> |
28 | 34 | #include <hal/nrf_power.h> |
29 | 35 | #include <hal/nrf_regulators.h> |
30 | | -#endif |
31 | | -#include <soc/nrfx_coredep.h> |
32 | | - |
33 | | -#include <nrf_erratas.h> |
34 | | -#include <system_nrf54l.h> |
35 | | -#include <zephyr/drivers/clock_control/nrf_clock_control.h> |
36 | | - |
37 | | -LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); |
38 | 36 |
|
39 | | -#if defined(NRF_APPLICATION) |
40 | 37 | #define LFXO_NODE DT_NODELABEL(lfxo) |
41 | 38 | #define HFXO_NODE DT_NODELABEL(hfxo) |
42 | 39 | #endif |
43 | 40 |
|
44 | | -static int nordicsemi_nrf54l_init(void) |
| 41 | +static inline void power_and_clock_configuration(void) |
45 | 42 | { |
46 | | - /* Update the SystemCoreClock global variable with current core clock |
47 | | - * retrieved from the DT. |
48 | | - */ |
49 | | - SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu)); |
50 | | - |
51 | | -#if defined(NRF_APPLICATION) |
52 | | - /* Enable ICACHE */ |
53 | | - sys_cache_instr_enable(); |
54 | | - |
| 43 | +/* NRF_REGULATORS and NRF_OSCILLATORS are configured to be secure |
| 44 | + * as NRF_REGULATORS.POFCON is needed by the secure domain to |
| 45 | + * prevent glitches when the power supply is attacked. |
| 46 | + * |
| 47 | + * NRF_OSCILLATORS is also configured as secure because of a HW limitation |
| 48 | + * that requires them to be configured with the same security property. |
| 49 | + */ |
55 | 50 | #if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal) |
56 | 51 | uint32_t xosc32ktrim = NRF_FICR->XOSC32KTRIM; |
57 | 52 |
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@@ -165,7 +160,22 @@ static int nordicsemi_nrf54l_init(void) |
165 | 160 | nrf_regulators_vreg_enable_set(NRF_REGULATORS, NRF_REGULATORS_VREG_MAIN, true); |
166 | 161 | #endif |
167 | 162 |
|
168 | | -#endif /* NRF_APPLICATION */ |
| 163 | +} |
| 164 | +#endif /* NRF_APPLICATION && !CONFIG_TRUSTED_EXECUTION_NONSECURE */ |
| 165 | + |
| 166 | +static int nordicsemi_nrf54l_init(void) |
| 167 | +{ |
| 168 | + /* Update the SystemCoreClock global variable with current core clock |
| 169 | + * retrieved from the DT. |
| 170 | + */ |
| 171 | + SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu)); |
| 172 | + |
| 173 | + /* Enable ICACHE. Empty if cache is not enabled. */ |
| 174 | + sys_cache_instr_enable(); |
| 175 | + |
| 176 | +#if defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) |
| 177 | + power_and_clock_configuration(); |
| 178 | +#endif |
169 | 179 |
|
170 | 180 | return 0; |
171 | 181 | } |
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