@@ -108,6 +108,10 @@ static const nrf_gpio_pin_drive_t drive_modes[NRF_DRIVE_COUNT] = {
108108#endif
109109#endif
110110
111+ #if DT_HAS_COMPAT_STATUS_OKAY (nordic_nrf_tdm )
112+ #define NRF_PSEL_TDM (reg , line ) ((NRF_TDM_Type *)reg)->PSEL.line
113+ #endif
114+
111115int pinctrl_configure_pins (const pinctrl_soc_pin_t * pins , uint8_t pin_cnt ,
112116 uintptr_t reg )
113117{
@@ -354,6 +358,47 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
354358 input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
355359 break ;
356360#endif /* defined(NRF_PSEL_QSPI) */
361+ #if defined(NRF_PSEL_TDM )
362+ case NRF_FUN_TDM_SCK_M :
363+ NRF_PSEL_TDM (reg , SCK ) = psel ;
364+ write = 0U ;
365+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
366+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
367+ break ;
368+ case NRF_FUN_TDM_SCK_S :
369+ NRF_PSEL_TDM (reg , SCK ) = psel ;
370+ dir = NRF_GPIO_PIN_DIR_INPUT ;
371+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
372+ break ;
373+ case NRF_FUN_TDM_FSYNC_M :
374+ NRF_PSEL_TDM (reg , FSYNC ) = psel ;
375+ write = 0U ;
376+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
377+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
378+ break ;
379+ case NRF_FUN_TDM_FSYNC_S :
380+ NRF_PSEL_TDM (reg , FSYNC ) = psel ;
381+ dir = NRF_GPIO_PIN_DIR_INPUT ;
382+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
383+ break ;
384+ case NRF_FUN_TDM_SDIN :
385+ NRF_PSEL_TDM (reg , SDIN ) = psel ;
386+ dir = NRF_GPIO_PIN_DIR_INPUT ;
387+ input = NRF_GPIO_PIN_INPUT_CONNECT ;
388+ break ;
389+ case NRF_FUN_TDM_SDOUT :
390+ NRF_PSEL_TDM (reg , SDOUT ) = psel ;
391+ write = 0U ;
392+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
393+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
394+ break ;
395+ case NRF_FUN_TDM_MCK :
396+ NRF_PSEL_TDM (reg , MCK ) = psel ;
397+ write = 0U ;
398+ dir = NRF_GPIO_PIN_DIR_OUTPUT ;
399+ input = NRF_GPIO_PIN_INPUT_DISCONNECT ;
400+ break ;
401+ #endif /* defined(NRF_PSEL_TDM) */
357402#if defined(NRF_GRTC_CLKOUT_FAST )
358403 case NRF_FUN_GRTC_CLKOUT_FAST :
359404#if NRF_GPIO_HAS_SEL && defined(GPIO_PIN_CNF_CTRLSEL_GRTC )
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