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* SPDX-License-Identifier: Apache-2.0
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*/
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+ #define DT_DRV_COMPAT nordic_nrf_spim
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+
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#include <zephyr/drivers/spi.h>
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#include <zephyr/drivers/spi/rtio.h>
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#include <zephyr/cache.h>
@@ -41,36 +43,21 @@ LOG_MODULE_REGISTER(spi_nrfx_spim, CONFIG_SPI_LOG_LEVEL);
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#define SPI_BUFFER_IN_RAM 1
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#endif
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- /*
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- * We use NODELABEL here because the nrfx API requires us to call
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- * functions which are named according to SoC peripheral instance
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- * being operated on. Since DT_INST() makes no guarantees about that,
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- * it won't work.
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- */
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- #define SPIM (idx ) DT_NODELABEL(spi##idx)
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- #define SPIM_PROP (idx , prop ) DT_PROP(SPIM(idx), prop)
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- #define SPIM_HAS_PROP (idx , prop ) DT_NODE_HAS_PROP(SPIM(idx), prop)
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-
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- /* Execute macro f(x) for all instances. */
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- #define SPIM_FOR_EACH_INSTANCE (f , sep , off_code , ...) \
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- NRFX_FOREACH_PRESENT(SPIM, f, sep, off_code, __VA_ARGS__)
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-
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/* Only CPUAPP and CPURAD can control clocks and power domains, so if a fast instance is
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* used by other cores, treat the SPIM like a normal one. This presumes the CPUAPP or CPURAD
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* have requested the clocks and power domains needed by the fast instance to be ACTIVE before
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* other cores use the fast instance.
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*/
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#if CONFIG_SOC_NRF54H20_CPUAPP || CONFIG_SOC_NRF54H20_CPURAD
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- #define INSTANCE_IS_FAST (unused , prefix , idx , _ ) \
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- UTIL_AND( \
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- UTIL_AND( \
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- IS_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##idx), \
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- NRF_DT_IS_FAST(SPIM(idx)) \
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- ), \
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- IS_ENABLED(CONFIG_CLOCK_CONTROL) \
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+ #define INSTANCE_IS_FAST (inst ) \
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+ UTIL_AND( \
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+ NRF_DT_INST_IS_FAST(inst), \
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+ IS_ENABLED(CONFIG_CLOCK_CONTROL) \
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)
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- #if SPIM_FOR_EACH_INSTANCE (INSTANCE_IS_FAST , (|| ), (0 ))
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+ #define INSTANCE_IS_FAST_OR (inst ) INSTANCE_IS_FAST(inst) ||
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+
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+ #if (DT_INST_FOREACH_STATUS_OKAY (INSTANCE_IS_FAST_OR ) 0 )
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#define SPIM_ANY_FAST 1
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/* If fast instances are used then system managed device PM cannot be used because
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* it may call PM actions from locked context and fast SPIM PM actions can only be
@@ -80,12 +67,12 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
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#endif
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#endif
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- #define SPIM_PINS_CROSS_DOMAIN (unused , prefix , idx , _ ) \
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- COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIM(prefix##idx)), \
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- (SPIM_PROP(idx, cross_domain_pins_supported)), \
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- (0))
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+ #define SPIM_PINS_CROSS_DOMAIN (inst ) \
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+ DT_INST_PROP(inst, cross_domain_pins_supported)
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- #if NRFX_FOREACH_PRESENT (SPIM , SPIM_PINS_CROSS_DOMAIN , (|| ), (0 ))
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+ #define SPIM_PINS_CROSS_DOMAIN_OR (inst ) SPIM_PINS_CROSS_DOMAIN(inst) ||
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+
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+ #if (SPIM_PINS_CROSS_DOMAIN_OR (INSTANCE_IS_FAST_OR ) 0 )
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#include <hal/nrf_gpio.h>
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/* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on
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* a port different from the default one.
@@ -103,6 +90,7 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
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struct spi_nrfx_data {
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+ nrfx_spim_t spim ;
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struct spi_context ctx ;
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const struct device * dev ;
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size_t chunk_len ;
@@ -123,7 +111,6 @@ struct spi_nrfx_data {
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};
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struct spi_nrfx_config {
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- nrfx_spim_t spim ;
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uint32_t max_freq ;
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nrfx_spim_config_t def_config ;
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void (* irq_connect )(void );
@@ -221,8 +208,7 @@ static bool spim_has_cross_domain_connection(const struct spi_nrfx_config *confi
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static inline void finalize_spi_transaction (const struct device * dev , bool deactivate_cs )
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{
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struct spi_nrfx_data * dev_data = dev -> data ;
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- const struct spi_nrfx_config * dev_config = dev -> config ;
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- void * reg = dev_config -> spim .p_reg ;
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+ void * reg = dev_data -> spim .p_reg ;
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if (deactivate_cs ) {
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spi_context_cs_control (& dev_data -> ctx , false);
@@ -301,7 +287,7 @@ static int configure(const struct device *dev,
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struct spi_context * ctx = & dev_data -> ctx ;
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uint32_t max_freq = dev_config -> max_freq ;
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nrfx_spim_config_t config ;
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- nrfx_err_t result ;
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+ int result ;
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uint32_t sck_pin ;
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if (dev_data -> initialized && spi_context_configured (ctx , spi_cfg )) {
@@ -359,22 +345,22 @@ static int configure(const struct device *dev,
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config .mode = get_nrf_spim_mode (spi_cfg -> operation );
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config .bit_order = get_nrf_spim_bit_order (spi_cfg -> operation );
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- sck_pin = nrfy_spim_sck_pin_get (dev_config -> spim .p_reg );
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+ sck_pin = nrfy_spim_sck_pin_get (dev_data -> spim .p_reg );
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if (sck_pin != NRF_SPIM_PIN_NOT_CONNECTED ) {
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nrfy_gpio_pin_write (sck_pin , spi_cfg -> operation & SPI_MODE_CPOL ? 1 : 0 );
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}
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if (dev_data -> initialized ) {
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- nrfx_spim_uninit (& dev_config -> spim );
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+ nrfx_spim_uninit (& dev_data -> spim );
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dev_data -> initialized = false;
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}
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- result = nrfx_spim_init (& dev_config -> spim , & config ,
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+ result = nrfx_spim_init (& dev_data -> spim , & config ,
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event_handler , (void * )dev );
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- if (result != NRFX_SUCCESS ) {
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- LOG_ERR ("Failed to initialize nrfx driver: %08x " , result );
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- return - EIO ;
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+ if (result < 0 ) {
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+ LOG_ERR ("Failed to initialize nrfx driver: %d " , result );
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+ return result ;
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}
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dev_data -> initialized = true;
@@ -496,7 +482,6 @@ static void transfer_next_chunk(const struct device *dev)
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if (chunk_len > 0 ) {
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nrfx_spim_xfer_desc_t xfer ;
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- nrfx_err_t result ;
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const uint8_t * tx_buf = ctx -> tx_buf ;
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uint8_t * rx_buf = ctx -> rx_buf ;
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@@ -506,7 +491,7 @@ static void transfer_next_chunk(const struct device *dev)
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#ifdef SPI_BUFFER_IN_RAM
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if (spi_context_tx_buf_on (ctx ) &&
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- !nrf_dma_accessible_check (& dev_config -> spim .p_reg , tx_buf )) {
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+ !nrf_dma_accessible_check (& dev_data -> spim .p_reg , tx_buf )) {
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if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE ) {
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chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE ;
@@ -517,7 +502,7 @@ static void transfer_next_chunk(const struct device *dev)
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}
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if (spi_context_rx_buf_on (ctx ) &&
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- !nrf_dma_accessible_check (& dev_config -> spim .p_reg , rx_buf )) {
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+ !nrf_dma_accessible_check (& dev_data -> spim .p_reg , rx_buf )) {
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if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE ) {
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chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE ;
@@ -556,11 +541,10 @@ static void transfer_next_chunk(const struct device *dev)
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}
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#endif
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if (error == 0 ) {
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- result = nrfx_spim_xfer (& dev_config -> spim , & xfer , 0 );
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- if (result == NRFX_SUCCESS ) {
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+ error = nrfx_spim_xfer (& dev_data -> spim , & xfer , 0 );
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+ if (error == 0 ) {
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return ;
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}
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- error = - EIO ;
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#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
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anomaly_58_workaround_clear (dev_data );
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#endif
@@ -632,7 +616,7 @@ static int transceive(const struct device *dev,
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{
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struct spi_nrfx_data * dev_data = dev -> data ;
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const struct spi_nrfx_config * dev_config = dev -> config ;
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- void * reg = dev_config -> spim .p_reg ;
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+ void * reg = dev_data -> spim .p_reg ;
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int error ;
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pm_device_runtime_get (dev );
@@ -678,7 +662,7 @@ static int transceive(const struct device *dev,
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/* Abort the current transfer by deinitializing
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* the nrfx driver.
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*/
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- nrfx_spim_uninit (& dev_config -> spim );
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+ nrfx_spim_uninit (& dev_data -> spim );
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dev_data -> initialized = false;
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/* Make sure the transaction is finished (it may be
@@ -795,7 +779,7 @@ static void spim_suspend(const struct device *dev)
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struct spi_nrfx_data * dev_data = dev -> data ;
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if (dev_data -> initialized ) {
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- nrfx_spim_uninit (& dev_config -> spim );
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+ nrfx_spim_uninit (& dev_data -> spim );
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dev_data -> initialized = false;
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}
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@@ -897,100 +881,97 @@ static int spi_nrfx_deinit(const struct device *dev)
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return 0 ;
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}
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- #define SPI_NRFX_SPIM_EXTENDED_CONFIG (idx ) \
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+ #define SPI_NRFX_SPIM_EXTENDED_CONFIG (inst ) \
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IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
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(.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
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- COND_CODE_1(SPIM_PROP(idx , rx_delay_supported), \
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- (.rx_delay = SPIM_PROP(idx , rx_delay),), \
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+ COND_CODE_1(DT_INST_PROP(inst , rx_delay_supported), \
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+ (.rx_delay = DT_INST_PROP(inst , rx_delay),), \
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()) \
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))
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/* Get initialization priority of an instance. Instances that requires clock control
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* which is using nrfs (IPC) are initialized later.
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*/
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- #define SPIM_INIT_PRIORITY (idx ) \
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- COND_CODE_1(INSTANCE_IS_FAST(_, /*empty*/ , idx , _ ), \
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+ #define SPIM_INIT_PRIORITY (inst ) \
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+ COND_CODE_1(INSTANCE_IS_FAST(inst ), \
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(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
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(CONFIG_SPI_INIT_PRIORITY))
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- #define SPI_NRFX_SPIM_DEFINE (idx ) \
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- NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(SPIM(idx)); \
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- NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIM(idx)); \
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- static void irq_connect##idx(void) \
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- { \
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- IRQ_CONNECT(DT_IRQN(SPIM(idx)), DT_IRQ(SPIM(idx), priority), \
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- nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \
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- } \
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+ #define SPI_NRFX_SPIM_DEFINE (inst ) \
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+ NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst)); \
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+ NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \
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IF_ENABLED(SPI_BUFFER_IN_RAM, \
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- (static uint8_t spim_##idx ##_tx_buffer \
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+ (static uint8_t spim_##inst ##_tx_buffer \
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[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
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- DMM_MEMORY_SECTION(SPIM(idx )); \
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- static uint8_t spim_##idx ##_rx_buffer \
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+ DMM_MEMORY_SECTION(DT_DRV_INST(inst )); \
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+ static uint8_t spim_##inst ##_rx_buffer \
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[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
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- DMM_MEMORY_SECTION(SPIM(idx));)) \
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- static struct spi_nrfx_data spi_##idx##_data = { \
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+ DMM_MEMORY_SECTION(DT_DRV_INST(inst));)) \
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+ static struct spi_nrfx_data spi_##inst##_data = { \
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+ .spim = NRFX_SPIM_INSTANCE(DT_INST_REG_ADDR(inst)), \
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IF_ENABLED(CONFIG_MULTITHREADING, \
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- (SPI_CONTEXT_INIT_LOCK(spi_##idx ##_data, ctx),)) \
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+ (SPI_CONTEXT_INIT_LOCK(spi_##inst ##_data, ctx),)) \
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IF_ENABLED(CONFIG_MULTITHREADING, \
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- (SPI_CONTEXT_INIT_SYNC(spi_##idx ##_data, ctx),)) \
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- SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPIM(idx ), ctx) \
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+ (SPI_CONTEXT_INIT_SYNC(spi_##inst ##_data, ctx),)) \
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+ SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst ), ctx) \
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IF_ENABLED(SPI_BUFFER_IN_RAM, \
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- (.tx_buffer = spim_##idx ##_tx_buffer, \
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- .rx_buffer = spim_##idx ##_rx_buffer,)) \
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- .dev = DEVICE_DT_GET(SPIM(idx )), \
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+ (.tx_buffer = spim_##inst ##_tx_buffer, \
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+ .rx_buffer = spim_##inst ##_rx_buffer,)) \
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+ .dev = DEVICE_DT_GET(DT_DRV_INST(inst )), \
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.busy = false, \
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}; \
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- PINCTRL_DT_DEFINE(SPIM(idx)); \
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- static const struct spi_nrfx_config spi_##idx##z_config = { \
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- .spim = { \
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- .p_reg = (NRF_SPIM_Type *)DT_REG_ADDR(SPIM(idx)), \
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- .drv_inst_idx = NRFX_SPIM##idx##_INST_IDX, \
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- }, \
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- .max_freq = SPIM_PROP(idx, max_frequency), \
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+ static void irq_connect##inst(void) \
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+ { \
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+ IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \
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+ nrfx_spim_irq_handler, &spi_##inst##_data.spim, 0); \
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+ } \
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+ PINCTRL_DT_INST_DEFINE(inst); \
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+ static const struct spi_nrfx_config spi_##inst##z_config = { \
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+ .max_freq = DT_INST_PROP(inst, max_frequency), \
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.def_config = { \
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.skip_gpio_cfg = true, \
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.skip_psel_cfg = true, \
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.ss_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
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- .orc = SPIM_PROP(idx , overrun_character), \
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- SPI_NRFX_SPIM_EXTENDED_CONFIG(idx ) \
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+ .orc = DT_INST_PROP(inst , overrun_character), \
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+ SPI_NRFX_SPIM_EXTENDED_CONFIG(inst ) \
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}, \
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- .irq_connect = irq_connect##idx, \
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- .pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)), \
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- .max_chunk_len = BIT_MASK(SPIM_PROP(idx, easydma_maxcnt_bits)),\
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+ .irq_connect = irq_connect##inst, \
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+ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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+ .max_chunk_len = BIT_MASK( \
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+ DT_INST_PROP(inst, easydma_maxcnt_bits)), \
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COND_CODE_1(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58, \
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(.anomaly_58_workaround = \
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- SPIM_PROP(idx , anomaly_58_workaround),), \
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+ DT_INST_PROP(inst , anomaly_58_workaround),), \
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()) \
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- .wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios, \
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+ .wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(DT_DRV_INST(inst), \
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+ wake_gpios, \
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WAKE_PIN_NOT_USED), \
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- .wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx )), \
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+ .wake_gpiote = WAKE_GPIOTE_INSTANCE(DT_DRV_INST(inst )), \
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IF_ENABLED(SPIM_ANY_FAST, \
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(.clk_dev = DEVICE_DT_GET_OR_NULL( \
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- DT_CLOCKS_CTLR(SPIM(idx ))), \
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+ DT_CLOCKS_CTLR(DT_DRV_INST(inst ))), \
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.clk_spec = { \
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.frequency = NRF_CLOCK_CONTROL_FREQUENCY_MAX, \
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},)) \
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- IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(_, /*empty*/ , idx , _), \
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+ IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(inst), \
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(.cross_domain = true, \
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.default_port = \
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- DT_PROP_OR(DT_PHANDLE(SPIM(idx) , \
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+ DT_PROP_OR(DT_INST_PHANDLE(inst , \
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default_gpio_port), port, -1),)) \
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- .mem_reg = DMM_DEV_TO_REG(SPIM(idx )), \
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+ .mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst )), \
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}; \
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- BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \
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- !(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
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+ BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) || \
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+ !(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) & \
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+ GPIO_ACTIVE_LOW), \
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"WAKE line must be configured as active high"); \
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- PM_DEVICE_DT_DEFINE(SPIM(idx) , spim_nrfx_pm_action); \
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- SPI_DEVICE_DT_DEINIT_DEFINE(SPIM(idx) , \
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+ PM_DEVICE_DT_INST_DEFINE(inst , spim_nrfx_pm_action); \
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+ SPI_DEVICE_DT_INST_DEINIT_DEFINE(inst , \
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spi_nrfx_init, \
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spi_nrfx_deinit, \
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- PM_DEVICE_DT_GET(SPIM(idx) ), \
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- &spi_##idx ##_data, \
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- &spi_##idx ##z_config, \
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- POST_KERNEL, SPIM_INIT_PRIORITY(idx ), \
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+ PM_DEVICE_DT_INST_GET(inst ), \
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+ &spi_##inst ##_data, \
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+ &spi_##inst ##z_config, \
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+ POST_KERNEL, SPIM_INIT_PRIORITY(inst ), \
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&spi_nrfx_driver_api)
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- #define COND_NRF_SPIM_DEVICE (unused , prefix , i , _ ) \
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- IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);))
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-
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- SPIM_FOR_EACH_INSTANCE (COND_NRF_SPIM_DEVICE , ( ), ( ), _ )
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+ DT_INST_FOREACH_STATUS_OKAY (SPI_NRFX_SPIM_DEFINE )
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