Skip to content

Commit e468de5

Browse files
mstasiaknordicmstasiaknordic
committed
[nrf fromlist] drivers: spi: spi_nrfx_spim: use standard instantiation
Used API for standard instantiation and replaced nrfx_err_t error values with errno. Upstream PR #: 96792 Signed-off-by: Michał Stasiak <[email protected]>
1 parent 079d803 commit e468de5

File tree

1 file changed

+85
-102
lines changed

1 file changed

+85
-102
lines changed

‎drivers/spi/spi_nrfx_spim.c‎

Lines changed: 85 additions & 102 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

7+
#define DT_DRV_COMPAT nordic_nrf_spim
8+
79
#include <zephyr/drivers/spi.h>
810
#include <zephyr/drivers/spi/rtio.h>
911
#include <zephyr/cache.h>
@@ -32,36 +34,21 @@ LOG_MODULE_REGISTER(spi_nrfx_spim, CONFIG_SPI_LOG_LEVEL);
3234
#define SPI_BUFFER_IN_RAM 1
3335
#endif
3436

35-
/*
36-
* We use NODELABEL here because the nrfx API requires us to call
37-
* functions which are named according to SoC peripheral instance
38-
* being operated on. Since DT_INST() makes no guarantees about that,
39-
* it won't work.
40-
*/
41-
#define SPIM(idx) DT_NODELABEL(spi##idx)
42-
#define SPIM_PROP(idx, prop) DT_PROP(SPIM(idx), prop)
43-
#define SPIM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIM(idx), prop)
44-
45-
/* Execute macro f(x) for all instances. */
46-
#define SPIM_FOR_EACH_INSTANCE(f, sep, off_code, ...) \
47-
NRFX_FOREACH_PRESENT(SPIM, f, sep, off_code, __VA_ARGS__)
48-
4937
/* Only CPUAPP and CPURAD can control clocks and power domains, so if a fast instance is
5038
* used by other cores, treat the SPIM like a normal one. This presumes the CPUAPP or CPURAD
5139
* have requested the clocks and power domains needed by the fast instance to be ACTIVE before
5240
* other cores use the fast instance.
5341
*/
5442
#if CONFIG_SOC_NRF54H20_CPUAPP || CONFIG_SOC_NRF54H20_CPURAD
55-
#define INSTANCE_IS_FAST(unused, prefix, idx, _) \
56-
UTIL_AND( \
57-
UTIL_AND( \
58-
IS_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##idx), \
59-
NRF_DT_IS_FAST(SPIM(idx)) \
60-
), \
61-
IS_ENABLED(CONFIG_CLOCK_CONTROL) \
43+
#define INSTANCE_IS_FAST(inst) \
44+
UTIL_AND( \
45+
NRF_DT_INST_IS_FAST(inst), \
46+
IS_ENABLED(CONFIG_CLOCK_CONTROL) \
6247
)
6348

64-
#if SPIM_FOR_EACH_INSTANCE(INSTANCE_IS_FAST, (||), (0))
49+
#define INSTANCE_IS_FAST_OR(inst) INSTANCE_IS_FAST(inst) ||
50+
51+
#if (DT_INST_FOREACH_STATUS_OKAY(INSTANCE_IS_FAST_OR) 0)
6552
#define SPIM_ANY_FAST 1
6653
/* If fast instances are used then system managed device PM cannot be used because
6754
* it may call PM actions from locked context and fast SPIM PM actions can only be
@@ -71,12 +58,12 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
7158
#endif
7259
#endif
7360

74-
#define SPIM_PINS_CROSS_DOMAIN(unused, prefix, idx, _) \
75-
COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIM(prefix##idx)), \
76-
(SPIM_PROP(idx, cross_domain_pins_supported)), \
77-
(0))
61+
#define SPIM_PINS_CROSS_DOMAIN(inst) \
62+
DT_INST_PROP(inst, cross_domain_pins_supported)
63+
64+
#define SPIM_PINS_CROSS_DOMAIN_OR(inst) SPIM_PINS_CROSS_DOMAIN(inst) ||
7865

79-
#if NRFX_FOREACH_PRESENT(SPIM, SPIM_PINS_CROSS_DOMAIN, (||), (0))
66+
#if (DT_INST_FOREACH_STATUS_OKAY(SPIM_PINS_CROSS_DOMAIN_OR) 0)
8067
#include <hal/nrf_gpio.h>
8168
/* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on
8269
* a port different from the default one.
@@ -94,6 +81,7 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
9481

9582

9683
struct spi_nrfx_data {
84+
nrfx_spim_t spim;
9785
struct spi_context ctx;
9886
const struct device *dev;
9987
size_t chunk_len;
@@ -109,7 +97,6 @@ struct spi_nrfx_data {
10997
};
11098

11199
struct spi_nrfx_config {
112-
nrfx_spim_t spim;
113100
uint32_t max_freq;
114101
nrfx_spim_config_t def_config;
115102
void (*irq_connect)(void);
@@ -128,7 +115,7 @@ struct spi_nrfx_config {
128115
void *mem_reg;
129116
};
130117

131-
static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context);
118+
static void event_handler(const nrfx_spim_event_t *p_event, void *p_context);
132119

133120
static inline int request_clock(const struct device *dev)
134121
{
@@ -204,8 +191,7 @@ static bool spim_has_cross_domain_connection(const struct spi_nrfx_config *confi
204191
static inline void finalize_spi_transaction(const struct device *dev, bool deactivate_cs)
205192
{
206193
struct spi_nrfx_data *dev_data = dev->data;
207-
const struct spi_nrfx_config *dev_config = dev->config;
208-
void *reg = dev_config->spim.p_reg;
194+
void *reg = dev_data->spim.p_reg;
209195

210196
if (deactivate_cs) {
211197
spi_context_cs_control(&dev_data->ctx, false);
@@ -284,7 +270,7 @@ static int configure(const struct device *dev,
284270
struct spi_context *ctx = &dev_data->ctx;
285271
uint32_t max_freq = dev_config->max_freq;
286272
nrfx_spim_config_t config;
287-
nrfx_err_t result;
273+
int result;
288274
uint32_t sck_pin;
289275

290276
if (dev_data->initialized && spi_context_configured(ctx, spi_cfg)) {
@@ -342,22 +328,22 @@ static int configure(const struct device *dev,
342328
config.mode = get_nrf_spim_mode(spi_cfg->operation);
343329
config.bit_order = get_nrf_spim_bit_order(spi_cfg->operation);
344330

345-
sck_pin = nrfy_spim_sck_pin_get(dev_config->spim.p_reg);
331+
sck_pin = nrfy_spim_sck_pin_get(dev_data->spim.p_reg);
346332

347333
if (sck_pin != NRF_SPIM_PIN_NOT_CONNECTED) {
348334
nrfy_gpio_pin_write(sck_pin, spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0);
349335
}
350336

351337
if (dev_data->initialized) {
352-
nrfx_spim_uninit(&dev_config->spim);
338+
nrfx_spim_uninit(&dev_data->spim);
353339
dev_data->initialized = false;
354340
}
355341

356-
result = nrfx_spim_init(&dev_config->spim, &config,
342+
result = nrfx_spim_init(&dev_data->spim, &config,
357343
event_handler, (void *)dev);
358-
if (result != NRFX_SUCCESS) {
359-
LOG_ERR("Failed to initialize nrfx driver: %08x", result);
360-
return -EIO;
344+
if (result < 0) {
345+
LOG_ERR("Failed to initialize nrfx driver: %d", result);
346+
return result;
361347
}
362348

363349
dev_data->initialized = true;
@@ -396,7 +382,6 @@ static void transfer_next_chunk(const struct device *dev)
396382

397383
if (chunk_len > 0) {
398384
nrfx_spim_xfer_desc_t xfer;
399-
nrfx_err_t result;
400385
const uint8_t *tx_buf = ctx->tx_buf;
401386
uint8_t *rx_buf = ctx->rx_buf;
402387

@@ -406,7 +391,7 @@ static void transfer_next_chunk(const struct device *dev)
406391

407392
#ifdef SPI_BUFFER_IN_RAM
408393
if (spi_context_tx_buf_on(ctx) &&
409-
!nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) {
394+
!nrf_dma_accessible_check(&dev_data->spim.p_reg, tx_buf)) {
410395

411396
if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) {
412397
chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE;
@@ -417,7 +402,7 @@ static void transfer_next_chunk(const struct device *dev)
417402
}
418403

419404
if (spi_context_rx_buf_on(ctx) &&
420-
!nrf_dma_accessible_check(&dev_config->spim.p_reg, rx_buf)) {
405+
!nrf_dma_accessible_check(&dev_data->spim.p_reg, rx_buf)) {
421406

422407
if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) {
423408
chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE;
@@ -444,8 +429,8 @@ static void transfer_next_chunk(const struct device *dev)
444429
goto in_alloc_failed;
445430
}
446431

447-
result = nrfx_spim_xfer(&dev_config->spim, &xfer, 0);
448-
if (result == NRFX_SUCCESS) {
432+
error = nrfx_spim_xfer(&dev_data->spim, &xfer, 0);
433+
if (error == 0) {
449434
return;
450435
}
451436

@@ -460,7 +445,7 @@ static void transfer_next_chunk(const struct device *dev)
460445
finish_transaction(dev, error);
461446
}
462447

463-
static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context)
448+
static void event_handler(const nrfx_spim_event_t *p_event, void *p_context)
464449
{
465450
const struct device *dev = p_context;
466451
struct spi_nrfx_data *dev_data = dev->data;
@@ -511,7 +496,7 @@ static int transceive(const struct device *dev,
511496
{
512497
struct spi_nrfx_data *dev_data = dev->data;
513498
const struct spi_nrfx_config *dev_config = dev->config;
514-
void *reg = dev_config->spim.p_reg;
499+
void *reg = dev_data->spim.p_reg;
515500
int error;
516501

517502
pm_device_runtime_get(dev);
@@ -557,7 +542,7 @@ static int transceive(const struct device *dev,
557542
/* Abort the current transfer by deinitializing
558543
* the nrfx driver.
559544
*/
560-
nrfx_spim_uninit(&dev_config->spim);
545+
nrfx_spim_uninit(&dev_data->spim);
561546
dev_data->initialized = false;
562547

563548
/* Make sure the transaction is finished (it may be
@@ -638,6 +623,7 @@ static int spim_resume(const struct device *dev)
638623
{
639624
const struct spi_nrfx_config *dev_config = dev->config;
640625
struct spi_nrfx_data *dev_data = dev->data;
626+
(void)dev_data;
641627

642628
(void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
643629
/* nrfx_spim_init() will be called at configuration before
@@ -671,15 +657,15 @@ static void spim_suspend(const struct device *dev)
671657
struct spi_nrfx_data *dev_data = dev->data;
672658

673659
if (dev_data->initialized) {
674-
nrfx_spim_uninit(&dev_config->spim);
660+
nrfx_spim_uninit(&dev_data->spim);
675661
dev_data->initialized = false;
676662
}
677663

678664
if (pm_device_runtime_is_enabled(dev)) {
679665
release_clock(dev);
680666
}
681667

682-
spi_context_cs_put_all(&dev_data->ctx);
668+
(void)spi_context_cs_put_all(&dev_data->ctx);
683669

684670
#if SPIM_CROSS_DOMAIN_SUPPORTED
685671
if (dev_config->cross_domain && spim_has_cross_domain_connection(dev_config)) {
@@ -767,96 +753,93 @@ static int spi_nrfx_deinit(const struct device *dev)
767753
return 0;
768754
}
769755

770-
#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
756+
#define SPI_NRFX_SPIM_EXTENDED_CONFIG(inst) \
771757
IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
772758
(.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
773-
COND_CODE_1(SPIM_PROP(idx, rx_delay_supported), \
774-
(.rx_delay = SPIM_PROP(idx, rx_delay),), \
759+
COND_CODE_1(DT_INST_PROP(inst, rx_delay_supported), \
760+
(.rx_delay = DT_INST_PROP(inst, rx_delay),), \
775761
()) \
776762
))
777763

778764
/* Get initialization priority of an instance. Instances that requires clock control
779765
* which is using nrfs (IPC) are initialized later.
780766
*/
781-
#define SPIM_INIT_PRIORITY(idx) \
782-
COND_CODE_1(INSTANCE_IS_FAST(_, /*empty*/, idx, _), \
767+
#define SPIM_INIT_PRIORITY(inst) \
768+
COND_CODE_1(INSTANCE_IS_FAST(inst), \
783769
(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
784770
(CONFIG_SPI_INIT_PRIORITY))
785771

786-
#define SPI_NRFX_SPIM_DEFINE(idx) \
787-
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(SPIM(idx)); \
788-
NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIM(idx)); \
789-
static void irq_connect##idx(void) \
790-
{ \
791-
IRQ_CONNECT(DT_IRQN(SPIM(idx)), DT_IRQ(SPIM(idx), priority), \
792-
nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \
793-
} \
772+
#define SPI_NRFX_SPIM_DEFINE(inst) \
773+
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst)); \
774+
NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \
794775
IF_ENABLED(SPI_BUFFER_IN_RAM, \
795-
(static uint8_t spim_##idx##_tx_buffer \
776+
(static uint8_t spim_##inst##_tx_buffer \
796777
[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
797-
DMM_MEMORY_SECTION(SPIM(idx)); \
798-
static uint8_t spim_##idx##_rx_buffer \
778+
DMM_MEMORY_SECTION(DT_DRV_INST(inst)); \
779+
static uint8_t spim_##inst##_rx_buffer \
799780
[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
800-
DMM_MEMORY_SECTION(SPIM(idx));)) \
801-
static struct spi_nrfx_data spi_##idx##_data = { \
781+
DMM_MEMORY_SECTION(DT_DRV_INST(inst));)) \
782+
static struct spi_nrfx_data spi_##inst##_data = { \
783+
.spim = NRFX_SPIM_INSTANCE(DT_INST_REG_ADDR(inst)), \
802784
IF_ENABLED(CONFIG_MULTITHREADING, \
803-
(SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \
785+
(SPI_CONTEXT_INIT_LOCK(spi_##inst##_data, ctx),)) \
804786
IF_ENABLED(CONFIG_MULTITHREADING, \
805-
(SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx),)) \
806-
SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPIM(idx), ctx) \
787+
(SPI_CONTEXT_INIT_SYNC(spi_##inst##_data, ctx),)) \
788+
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx) \
807789
IF_ENABLED(SPI_BUFFER_IN_RAM, \
808-
(.tx_buffer = spim_##idx##_tx_buffer, \
809-
.rx_buffer = spim_##idx##_rx_buffer,)) \
810-
.dev = DEVICE_DT_GET(SPIM(idx)), \
790+
(.tx_buffer = spim_##inst##_tx_buffer, \
791+
.rx_buffer = spim_##inst##_rx_buffer,)) \
792+
.dev = DEVICE_DT_GET(DT_DRV_INST(inst)), \
811793
.busy = false, \
812794
}; \
813-
PINCTRL_DT_DEFINE(SPIM(idx)); \
814-
static const struct spi_nrfx_config spi_##idx##z_config = { \
815-
.spim = { \
816-
.p_reg = (NRF_SPIM_Type *)DT_REG_ADDR(SPIM(idx)), \
817-
.drv_inst_idx = NRFX_SPIM##idx##_INST_IDX, \
818-
}, \
819-
.max_freq = SPIM_PROP(idx, max_frequency), \
795+
static void irq_connect##inst(void) \
796+
{ \
797+
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \
798+
nrfx_spim_irq_handler, &spi_##inst##_data.spim, 0); \
799+
} \
800+
PINCTRL_DT_INST_DEFINE(inst); \
801+
static const struct spi_nrfx_config spi_##inst##z_config = { \
802+
.max_freq = DT_INST_PROP(inst, max_frequency), \
820803
.def_config = { \
821804
.skip_gpio_cfg = true, \
822805
.skip_psel_cfg = true, \
823806
.ss_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
824-
.orc = SPIM_PROP(idx, overrun_character), \
825-
SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \
807+
.orc = DT_INST_PROP(inst, overrun_character), \
808+
SPI_NRFX_SPIM_EXTENDED_CONFIG(inst) \
826809
}, \
827-
.irq_connect = irq_connect##idx, \
828-
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)), \
829-
.max_chunk_len = BIT_MASK(SPIM_PROP(idx, easydma_maxcnt_bits)),\
830-
.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios, \
810+
.irq_connect = irq_connect##inst, \
811+
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
812+
.max_chunk_len = BIT_MASK( \
813+
DT_INST_PROP(inst, easydma_maxcnt_bits)), \
814+
.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(DT_DRV_INST(inst), \
815+
wake_gpios, \
831816
WAKE_PIN_NOT_USED), \
832-
.wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)), \
817+
.wake_gpiote = WAKE_GPIOTE_INSTANCE(DT_DRV_INST(inst)), \
833818
IF_ENABLED(SPIM_ANY_FAST, \
834819
(.clk_dev = DEVICE_DT_GET_OR_NULL( \
835-
DT_CLOCKS_CTLR(SPIM(idx))), \
820+
DT_CLOCKS_CTLR(DT_DRV_INST(inst))), \
836821
.clk_spec = { \
837822
.frequency = NRF_CLOCK_CONTROL_FREQUENCY_MAX, \
838823
},)) \
839-
IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(_, /*empty*/, idx, _), \
824+
IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(inst), \
840825
(.cross_domain = true, \
841826
.default_port = \
842-
DT_PROP_OR(DT_PHANDLE(SPIM(idx), \
827+
DT_PROP_OR(DT_INST_PHANDLE(inst, \
843828
default_gpio_port), port, -1),)) \
844-
.mem_reg = DMM_DEV_TO_REG(SPIM(idx)), \
829+
.mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)), \
845830
}; \
846-
BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \
847-
!(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
831+
BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) || \
832+
!(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) & \
833+
GPIO_ACTIVE_LOW), \
848834
"WAKE line must be configured as active high"); \
849-
PM_DEVICE_DT_DEFINE(SPIM(idx), spim_nrfx_pm_action); \
850-
SPI_DEVICE_DT_DEINIT_DEFINE(SPIM(idx), \
835+
PM_DEVICE_DT_INST_DEFINE(inst, spim_nrfx_pm_action); \
836+
SPI_DEVICE_DT_INST_DEINIT_DEFINE(inst, \
851837
spi_nrfx_init, \
852838
spi_nrfx_deinit, \
853-
PM_DEVICE_DT_GET(SPIM(idx)), \
854-
&spi_##idx##_data, \
855-
&spi_##idx##z_config, \
856-
POST_KERNEL, SPIM_INIT_PRIORITY(idx), \
839+
PM_DEVICE_DT_INST_GET(inst), \
840+
&spi_##inst##_data, \
841+
&spi_##inst##z_config, \
842+
POST_KERNEL, SPIM_INIT_PRIORITY(inst), \
857843
&spi_nrfx_driver_api)
858844

859-
#define COND_NRF_SPIM_DEVICE(unused, prefix, i, _) \
860-
IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);))
861-
862-
SPIM_FOR_EACH_INSTANCE(COND_NRF_SPIM_DEVICE, (), (), _)
845+
DT_INST_FOREACH_STATUS_OKAY(SPI_NRFX_SPIM_DEFINE)

0 commit comments

Comments
 (0)