@@ -312,191 +312,6 @@ DT_INST_FOREACH_STATUS_OKAY(QUIRK_NRF_USBHS_DEFINE)
312312
313313#endif /*DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_usbhs) */
314314
315- #if DT_HAS_COMPAT_STATUS_OKAY (nordic_nrf_usbhs_nrf54l )
316-
317- #define DT_DRV_COMPAT snps_dwc2
318-
319- #define USBHS_DT_WRAPPER_REG_ADDR (n ) UINT_TO_POINTER(DT_INST_REG_ADDR_BY_NAME(n, wrapper))
320-
321- #include <nrf.h>
322-
323- #define NRF_DEFAULT_IRQ_PRIORITY 1
324-
325- /*
326- * On USBHS, we cannot access the DWC2 register until VBUS is detected and
327- * valid. If the user tries to force usbd_enable() and the corresponding
328- * udc_enable() without a "VBUS ready" notification, the event wait will block
329- * until a valid VBUS signal is detected or until the
330- * CONFIG_UDC_DWC2_USBHS_VBUS_READY_TIMEOUT timeout expires.
331- */
332- static K_EVENT_DEFINE (usbhs_events );
333- #define USBHS_VBUS_READY BIT(0)
334-
335- static void vregusb_isr (const void * arg )
336- {
337- const struct device * dev = arg ;
338-
339- if (NRF_VREGUSB -> EVENTS_VBUSDETECTED ) {
340- NRF_VREGUSB -> EVENTS_VBUSDETECTED = 0 ;
341- k_event_post (& usbhs_events , USBHS_VBUS_READY );
342- udc_submit_event (dev , UDC_EVT_VBUS_READY , 0 );
343- }
344-
345- if (NRF_VREGUSB -> EVENTS_VBUSREMOVED ) {
346- NRF_VREGUSB -> EVENTS_VBUSREMOVED = 0 ;
347- k_event_set_masked (& usbhs_events , 0 , USBHS_VBUS_READY );
348- udc_submit_event (dev , UDC_EVT_VBUS_REMOVED , 0 );
349- }
350- }
351-
352- static inline int usbhs_enable_vreg (const struct device * dev )
353- {
354- IRQ_CONNECT (VREGUSB_IRQn , NRF_DEFAULT_IRQ_PRIORITY ,
355- vregusb_isr , DEVICE_DT_INST_GET (0 ), 0 );
356-
357- NRF_VREGUSB -> INTEN = VREGUSB_INTEN_VBUSDETECTED_Msk |
358- VREGUSB_INTEN_VBUSREMOVED_Msk ;
359- NRF_VREGUSB -> TASKS_START = 1 ;
360-
361- /* TODO: Determine conditions when VBUSDETECTED is not generated */
362- if (sys_read32 ((mem_addr_t )NRF_VREGUSB + 0x400 ) & BIT (2 )) {
363- k_event_post (& usbhs_events , USBHS_VBUS_READY );
364- udc_submit_event (dev , UDC_EVT_VBUS_READY , 0 );
365- }
366-
367- irq_enable (VREGUSB_IRQn );
368-
369- return 0 ;
370- }
371-
372- static inline int usbhs_enable_core (const struct device * dev )
373- {
374- NRF_USBHS_Type * wrapper = USBHS_DT_WRAPPER_REG_ADDR (0 );
375- k_timeout_t timeout = K_FOREVER ;
376-
377- if (!k_event_wait (& usbhs_events , USBHS_VBUS_READY , false, K_NO_WAIT )) {
378- LOG_WRN ("VBUS is not ready, block udc_enable()" );
379- if (!k_event_wait (& usbhs_events , USBHS_VBUS_READY , false, timeout )) {
380- return - ETIMEDOUT ;
381- }
382- }
383-
384- /* TODO: Request PCLK24M using clock control driver */
385- NRF_CLOCK -> TASKS_XO24MSTART = 1 ;
386- while (NRF_CLOCK -> EVENTS_XO24MSTARTED == 0 ) {
387- }
388-
389- /* Power up peripheral */
390- wrapper -> ENABLE = USBHS_ENABLE_CORE_Msk ;
391-
392- /* Set ID to Device and force D+ pull-up off for now */
393- wrapper -> PHY .OVERRIDEVALUES = (1 << 31 );
394- wrapper -> PHY .INPUTOVERRIDE = (1 << 31 ) | USBHS_PHY_INPUTOVERRIDE_VBUSVALID_Msk ;
395-
396- /* Release PHY power-on reset */
397- wrapper -> ENABLE = USBHS_ENABLE_PHY_Msk | USBHS_ENABLE_CORE_Msk ;
398-
399- /* Wait for PHY clock to start */
400- k_busy_wait (45 );
401-
402- /* Release DWC2 reset */
403- wrapper -> TASKS_START = 1UL ;
404-
405- /* Wait for clock to start to avoid hang on too early register read */
406- k_busy_wait (1 );
407-
408- /* DWC2 opmode is now guaranteed to be Non-Driving, allow D+ pull-up to
409- * become active once driver clears DCTL SftDiscon bit.
410- */
411- wrapper -> PHY .INPUTOVERRIDE = (1 << 31 );
412-
413- return 0 ;
414- }
415-
416- static inline int usbhs_disable_core (const struct device * dev )
417- {
418- NRF_USBHS_Type * wrapper = USBHS_DT_WRAPPER_REG_ADDR (0 );
419-
420- /* Set ID to Device and forcefully disable D+ pull-up */
421- wrapper -> PHY .OVERRIDEVALUES = (1 << 31 );
422- wrapper -> PHY .INPUTOVERRIDE = (1 << 31 ) | USBHS_PHY_INPUTOVERRIDE_VBUSVALID_Msk ;
423-
424- wrapper -> ENABLE = 0UL ;
425-
426- /* TODO: Release PCLK24M using clock control driver */
427- NRF_CLOCK -> EVENTS_XO24MSTARTED = 0 ;
428- NRF_CLOCK -> TASKS_XO24MSTOP = 1 ;
429-
430- return 0 ;
431- }
432-
433- static inline int usbhs_disable_vreg (const struct device * dev )
434- {
435- NRF_VREGUSB -> INTEN = 0 ;
436- NRF_VREGUSB -> TASKS_STOP = 1 ;
437-
438- return 0 ;
439- }
440-
441- static inline int usbhs_init_caps (const struct device * dev )
442- {
443- struct udc_data * data = dev -> data ;
444-
445- data -> caps .can_detect_vbus = true;
446- data -> caps .hs = true;
447-
448- return 0 ;
449- }
450-
451- static inline int usbhs_is_phy_clk_off (const struct device * dev )
452- {
453- return !k_event_test (& usbhs_events , USBHS_VBUS_READY );
454- }
455-
456- static inline int usbhs_post_hibernation_entry (const struct device * dev )
457- {
458- const struct udc_dwc2_config * const config = dev -> config ;
459- struct usb_dwc2_reg * const base = config -> base ;
460- NRF_USBHS_Type * wrapper = USBHS_DT_WRAPPER_REG_ADDR (0 );
461-
462- sys_set_bits ((mem_addr_t )& base -> pcgcctl , USB_DWC2_PCGCCTL_GATEHCLK );
463-
464- wrapper -> TASKS_STOP = 1 ;
465-
466- return 0 ;
467- }
468-
469- static inline int usbhs_pre_hibernation_exit (const struct device * dev )
470- {
471- const struct udc_dwc2_config * const config = dev -> config ;
472- struct usb_dwc2_reg * const base = config -> base ;
473- NRF_USBHS_Type * wrapper = USBHS_DT_WRAPPER_REG_ADDR (0 );
474-
475- sys_clear_bits ((mem_addr_t )& base -> pcgcctl , USB_DWC2_PCGCCTL_GATEHCLK );
476-
477- wrapper -> TASKS_START = 1 ;
478-
479- return 0 ;
480- }
481-
482- #define QUIRK_NRF_USBHS_DEFINE (n ) \
483- struct dwc2_vendor_quirks dwc2_vendor_quirks_##n = { \
484- .init = usbhs_enable_vreg, \
485- .pre_enable = usbhs_enable_core, \
486- .disable = usbhs_disable_core, \
487- .shutdown = usbhs_disable_vreg, \
488- .caps = usbhs_init_caps, \
489- .is_phy_clk_off = usbhs_is_phy_clk_off, \
490- .post_hibernation_entry = usbhs_post_hibernation_entry, \
491- .pre_hibernation_exit = usbhs_pre_hibernation_exit, \
492- };
493-
494- DT_INST_FOREACH_STATUS_OKAY (QUIRK_NRF_USBHS_DEFINE )
495-
496- #undef DT_DRV_COMPAT
497-
498- #endif /*DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_usbhs_nrf54l) */
499-
500315/* Add next vendor quirks definition above this line */
501316
502317#endif /* ZEPHYR_DRIVERS_USB_UDC_DWC2_VENDOR_QUIRKS_H */
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