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lines changed Original file line number Diff line number Diff line change @@ -43,5 +43,6 @@ if(CONFIG_TFM_PARTITION_PLATFORM)
4343endif ()
4444
4545zephyr_library_sources_ifdef(CONFIG_NRF_SYS_EVENT nrf_sys_event.c)
46+ zephyr_library_sources_ifdef(CONFIG_SOC_NRF_FORCE_CONSTLAT nrf_constlat.c)
4647zephyr_library_sources_ifdef(CONFIG_MRAM_LATENCY mram_latency.c)
4748zephyr_library_sources(gpiote_nrfx.c)
Original file line number Diff line number Diff line change @@ -21,6 +21,15 @@ config NRF_SYS_EVENT
2121 bool "nRF system event support"
2222 select NRFX_POWER if !NRF_PLATFORM_HALTIUM
2323
24+ config SOC_NRF_FORCE_CONSTLAT
25+ bool "Force constant latency mode in system ON"
26+ depends on NRF_SYS_EVENT && !RISCV
27+ help
28+ In constant latency mode the CPU wakeup latency and the PPI task response
29+ will be constant and kept at a minimum. This is secured by forcing a set
30+ of base resources on while in sleep. The advantage of having a constant
31+ and predictable latency will be at the cost of having increased power consumption.
32+
2433config MRAM_LATENCY
2534 bool "MRAM latency manager"
2635 depends on NRFS_HAS_MRAM_SERVICE
Original file line number Diff line number Diff line change 1+ /*
2+ * Copyright (c) 2025 Embeint Pty Ltd
3+ *
4+ * SPDX-License-Identifier: Apache-2.0
5+ */
6+
7+ #include <zephyr/init.h>
8+
9+ #include <nrf_sys_event.h>
10+
11+ static int nrf_const_lat (void )
12+ {
13+ return nrf_sys_event_request_global_constlat ();
14+ }
15+
16+ /* Immediately after the SoC init functions */
17+ SYS_INIT (nrf_const_lat , PRE_KERNEL_1 , 1 );
Original file line number Diff line number Diff line change @@ -86,14 +86,6 @@ config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
8686 With this option, the glitch detector is not disabled during system initialization.
8787 The CPU runs with the default state of glitch detector.
8888
89- config SOC_NRF_FORCE_CONSTLAT
90- bool "Force constant-latency mode"
91- help
92- In constant latency mode the CPU wakeup latency and the PPI task response
93- will be constant and kept at a minimum. This is secured by forcing a set
94- of base resources on while in sleep. The advantage of having a constant
95- and predictable latency will be at the cost of having increased power consumption.
96-
9789config SOC_NRF54L_ANOMALY_56_WORKAROUND
9890 bool "Apply workaround 56 for nRF54L SoCs"
9991 default y
Original file line number Diff line number Diff line change @@ -136,10 +136,6 @@ static inline void power_and_clock_configuration(void)
136136 nrf_oscillators_hfxo_cap_set (NRF_OSCILLATORS , false, 0 );
137137#endif
138138
139- if (IS_ENABLED (CONFIG_SOC_NRF_FORCE_CONSTLAT )) {
140- nrf_power_task_trigger (NRF_POWER , NRF_POWER_TASK_CONSTLAT );
141- }
142-
143139#if (DT_PROP (DT_NODELABEL (vregmain ), regulator_initial_mode ) == NRF5X_REG_MODE_DCDC )
144140 nrf_regulators_vreg_enable_set (NRF_REGULATORS , NRF_REGULATORS_VREG_MAIN , true);
145141#endif
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