33 *
44 * SPDX-License-Identifier: Apache-2.0
55 */
6- #include <nrfx_dppi.h>
76#include <hal/nrf_ipc.h>
87#include <helpers/nrfx_gppi.h>
98#include <zephyr/drivers/timer/nrf_rtc_timer.h>
@@ -27,7 +26,7 @@ static int32_t nrf53_sync_offset = -EBUSY;
2726union rtc_sync_channels {
2827 uint32_t raw ;
2928 struct {
30- uint8_t ppi ;
29+ nrfx_gppi_handle_t ppi ;
3130 uint8_t rtc ;
3231 uint8_t ipc_out ;
3332 uint8_t ipc_in ;
@@ -74,14 +73,15 @@ union rtc_sync_channels {
7473static void ppi_ipc_to_rtc (union rtc_sync_channels channels , bool setup )
7574{
7675 nrf_ipc_event_t ipc_evt = nrf_ipc_receive_event_get (channels .ch .ipc_in );
77- uint32_t task_addr = z_nrf_rtc_timer_capture_task_address_get (channels .ch .rtc );
76+ uint32_t eep = nrf_ipc_event_address_get (NRF_IPC , ipc_evt );
77+ uint32_t tep = z_nrf_rtc_timer_capture_task_address_get (channels .ch .rtc );
7878
7979 if (setup ) {
80- nrfx_gppi_task_endpoint_setup (channels .ch .ppi , task_addr );
81- nrf_ipc_publish_set ( NRF_IPC , ipc_evt , channels .ch .ppi );
80+ nrfx_gppi_ep_attach (channels .ch .ppi , eep );
81+ nrfx_gppi_ep_attach ( channels .ch .ppi , tep );
8282 } else {
83- nrfx_gppi_task_endpoint_clear ( channels . ch . ppi , task_addr );
84- nrf_ipc_publish_clear ( NRF_IPC , ipc_evt );
83+ nrfx_gppi_ep_clear ( eep );
84+ nrfx_gppi_ep_clear ( tep );
8585 }
8686}
8787
@@ -92,30 +92,25 @@ static void ppi_ipc_to_rtc(union rtc_sync_channels channels, bool setup)
9292 */
9393static void ppi_rtc_to_ipc (union rtc_sync_channels channels , bool setup )
9494{
95- uint32_t evt_addr = z_nrf_rtc_timer_compare_evt_address_get (channels .ch .rtc );
9695 nrf_ipc_task_t ipc_task = nrf_ipc_send_task_get (channels .ch .ipc_out );
96+ uint32_t eep = z_nrf_rtc_timer_compare_evt_address_get (channels .ch .rtc );
97+ uint32_t tep = nrf_ipc_task_address_get (NRF_IPC , ipc_task );
9798
9899 if (setup ) {
99- nrf_ipc_subscribe_set ( NRF_IPC , ipc_task , channels .ch .ppi );
100- nrfx_gppi_event_endpoint_setup (channels .ch .ppi , evt_addr );
100+ nrfx_gppi_ep_attach ( channels .ch .ppi , eep );
101+ nrfx_gppi_ep_attach (channels .ch .ppi , tep );
101102 } else {
102- nrfx_gppi_event_endpoint_clear ( channels . ch . ppi , evt_addr );
103- nrf_ipc_subscribe_clear ( NRF_IPC , ipc_task );
103+ nrfx_gppi_ep_clear ( eep );
104+ nrfx_gppi_ep_clear ( tep );
104105 }
105106}
106107
107108/* Free DPPI and RTC channels */
108109static void free_resources (union rtc_sync_channels channels )
109110{
110- nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE (0 );
111- nrfx_err_t err ;
112-
113- nrfx_gppi_channels_disable (BIT (channels .ch .ppi ));
114-
111+ nrfx_gppi_conn_disable (channels .ch .ppi );
112+ nrfx_gppi_domain_conn_free (channels .ch .ppi );
115113 z_nrf_rtc_timer_chan_free (channels .ch .rtc );
116-
117- err = nrfx_dppi_channel_free (& dppi , channels .ch .ppi );
118- __ASSERT_NO_MSG (err == NRFX_SUCCESS );
119114}
120115
121116int z_nrf_rtc_timer_nrf53net_offset_get (void )
@@ -225,21 +220,18 @@ static int mbox_rx_init(void *user_data)
225220/* Setup RTC synchronization. */
226221static int sync_rtc_setup (void )
227222{
228- nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE (0 );
229- nrfx_err_t err ;
230223 union rtc_sync_channels channels ;
231224 int32_t sync_rtc_ch ;
232225 int rv ;
233226
234- err = nrfx_dppi_channel_alloc (& dppi , & channels .ch .ppi );
235- if (err != NRFX_SUCCESS ) {
236- rv = - ENODEV ;
227+ rv = nrfx_gppi_domain_conn_alloc (0 , 0 , & channels .ch .ppi );
228+ if (rv < 0 ) {
237229 goto bail ;
238230 }
239231
240232 sync_rtc_ch = z_nrf_rtc_timer_chan_alloc ();
241233 if (sync_rtc_ch < 0 ) {
242- nrfx_dppi_channel_free ( & dppi , channels .ch .ppi );
234+ nrfx_gppi_domain_conn_free ( channels .ch .ppi );
243235 rv = sync_rtc_ch ;
244236 goto bail ;
245237 }
@@ -253,7 +245,7 @@ static int sync_rtc_setup(void)
253245 goto bail ;
254246 }
255247
256- nrfx_gppi_channels_enable ( BIT ( channels .ch .ppi ) );
248+ nrfx_gppi_conn_enable ( channels .ch .ppi );
257249
258250 if (IS_ENABLED (CONFIG_SOC_COMPATIBLE_NRF5340_CPUAPP )) {
259251 ppi_ipc_to_rtc (channels , true);
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