Skip to content

Commit f8eb3c1

Browse files
bjarki-andreasenbjarki-andreasen
committed
[nrf fromtree] soc: nordic: nrf54h: transition from gpd to zephyr pinctrl and pds
Transition nrf54h away from the soc specific gpd (global power domain) driver which mixed power domains, pinctrl and gpio pin retention into a non scalable solution, forcing soc specific logic to bleed into nrf drivers. The new solution uses zephyrs PM_DEVICE based power domains to properly model the hardware layout of device and pin power domains, and moves pin retention logic out of drivers into pinctrl and gpio, which are the components which manage pins (pads). Signed-off-by: Bjarki Arge Andreasen <[email protected]> (cherry picked from commit 2b0d1ae)
1 parent 9f6115e commit f8eb3c1

27 files changed

+588
-374
lines changed

‎drivers/can/can_nrf.c‎

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,6 @@
1717
#include <zephyr/drivers/pinctrl.h>
1818
#include <zephyr/irq.h>
1919

20-
#ifdef CONFIG_SOC_NRF54H20_GPD
21-
#include <nrf/gpd.h>
22-
#endif
23-
2420
/* nRF CAN wrapper offsets */
2521
#define CAN_TASKS_START offsetof(NRF_CAN_Type, TASKS_START)
2622
#define CAN_EVENTS_CORE_0 offsetof(NRF_CAN_Type, EVENTS_CORE[0])
@@ -187,13 +183,6 @@ static int can_nrf_init(const struct device *dev)
187183
sys_write32(CAN_INTEN_CORE0_Msk | CAN_INTEN_CORE1_Msk, config->wrapper + CAN_INTEN);
188184
sys_write32(1U, config->wrapper + CAN_TASKS_START);
189185

190-
#ifdef CONFIG_SOC_NRF54H20_GPD
191-
ret = nrf_gpd_retain_pins_set(config->pcfg, false);
192-
if (ret < 0) {
193-
return ret;
194-
}
195-
#endif
196-
197186
config->irq_configure();
198187

199188
ret = can_mcan_configure_mram(dev, config->mrba, config->mram);

‎drivers/counter/counter_nrfx_timer.c‎

Lines changed: 4 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -35,23 +35,9 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME, LOG_LEVEL);
3535
#define MAYBE_CONST_CONFIG const
3636
#endif
3737

38-
#ifdef CONFIG_SOC_NRF54H20_GPD
39-
#include <nrf/gpd.h>
40-
41-
#define NRF_CLOCKS_INSTANCE_IS_FAST(node) \
42-
COND_CODE_1(DT_NODE_HAS_PROP(node, power_domains), \
43-
(IS_EQ(DT_PHA(node, power_domains, id), NRF_GPD_FAST_ACTIVE1)), \
44-
(0))
45-
46-
/* Macro must resolve to literal 0 or 1 */
47-
#define INSTANCE_IS_FAST(idx) NRF_CLOCKS_INSTANCE_IS_FAST(DT_DRV_INST(idx))
48-
49-
#define INSTANCE_IS_FAST_OR(idx) INSTANCE_IS_FAST(idx) ||
50-
51-
#if (DT_INST_FOREACH_STATUS_OKAY(INSTANCE_IS_FAST_OR) 0)
38+
#if NRF_DT_INST_ANY_IS_FAST
5239
#define COUNTER_ANY_FAST 1
5340
#endif
54-
#endif
5541

5642
struct counter_nrfx_data {
5743
counter_top_callback_t top_cb;
@@ -474,13 +460,13 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
474460
* which is using nrfs (IPC) are initialized later.
475461
*/
476462
#define TIMER_INIT_LEVEL(idx) \
477-
COND_CODE_1(INSTANCE_IS_FAST(idx), (POST_KERNEL), (PRE_KERNEL_1))
463+
COND_CODE_1(NRF_DT_INST_IS_FAST(idx), (POST_KERNEL), (PRE_KERNEL_1))
478464

479465
/* Get initialization priority of an instance. Instances that requires clock control
480466
* which is using nrfs (IPC) are initialized later.
481467
*/
482468
#define TIMER_INIT_PRIO(idx) \
483-
COND_CODE_1(INSTANCE_IS_FAST(idx), \
469+
COND_CODE_1(NRF_DT_INST_IS_FAST(idx), \
484470
(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
485471
(CONFIG_COUNTER_INIT_PRIORITY))
486472

@@ -536,7 +522,7 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
536522
}, \
537523
.ch_data = counter##idx##_ch_data, \
538524
.timer = (NRF_TIMER_Type *)DT_INST_REG_ADDR(idx), \
539-
IF_ENABLED(INSTANCE_IS_FAST(idx), \
525+
IF_ENABLED(NRF_DT_INST_IS_FAST(idx), \
540526
(.clk_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_DRV_INST(idx))), \
541527
.clk_spec = { \
542528
.frequency = NRF_PERIPH_GET_FREQUENCY(DT_DRV_INST(idx)), \

‎drivers/gpio/gpio_nrfx.c‎

Lines changed: 17 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,10 @@
1616

1717
#include <zephyr/drivers/gpio/gpio_utils.h>
1818

19-
#ifdef CONFIG_SOC_NRF54H20_GPD
20-
#include <nrf/gpd.h>
19+
#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_gpio_pad_group)
20+
#define GPIO_HAS_PAD_GROUP 1
21+
#else
22+
#define GPIO_HAS_PAD_GROUP 0
2123
#endif
2224

2325
#define GPIOTE_PHANDLE(id) DT_INST_PHANDLE(id, gpiote_instance)
@@ -56,8 +58,8 @@ struct gpio_nrfx_cfg {
5658
#if defined(GPIOTE_FEATURE_FLAG)
5759
uint32_t flags;
5860
#endif
59-
#ifdef CONFIG_SOC_NRF54H20_GPD
60-
uint8_t pad_pd;
61+
#if GPIO_HAS_PAD_GROUP
62+
const struct device *pad_group;
6163
#endif
6264
};
6365

@@ -87,30 +89,6 @@ static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags)
8789
return NRF_GPIO_PIN_NOPULL;
8890
}
8991

90-
static void gpio_nrfx_gpd_retain_set(const struct device *port, uint32_t mask)
91-
{
92-
#ifdef CONFIG_SOC_NRF54H20_GPD
93-
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
94-
95-
nrf_gpio_port_retain_enable(cfg->port, mask);
96-
#else
97-
ARG_UNUSED(port);
98-
ARG_UNUSED(mask);
99-
#endif
100-
}
101-
102-
static void gpio_nrfx_gpd_retain_clear(const struct device *port, uint32_t mask)
103-
{
104-
#ifdef CONFIG_SOC_NRF54H20_GPD
105-
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
106-
107-
nrf_gpio_port_retain_disable(cfg->port, mask);
108-
#else
109-
ARG_UNUSED(port);
110-
ARG_UNUSED(mask);
111-
#endif
112-
}
113-
11492
static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
11593
gpio_flags_t flags)
11694
{
@@ -122,6 +100,7 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
122100
nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
123101
nrf_gpio_pin_pull_t pull = get_pull(flags);
124102
nrf_gpio_pin_drive_t drive;
103+
int pm_ret;
125104

126105
switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
127106
case NRF_GPIO_DRIVE_S0S1:
@@ -157,8 +136,6 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
157136
return ret;
158137
}
159138

160-
gpio_nrfx_gpd_retain_clear(port, BIT(pin));
161-
162139
if (flags & GPIO_OUTPUT_INIT_HIGH) {
163140
nrf_gpio_port_out_set(cfg->port, BIT(pin));
164141
} else if (flags & GPIO_OUTPUT_INIT_LOW) {
@@ -246,8 +223,7 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
246223
}
247224

248225
end:
249-
gpio_nrfx_gpd_retain_set(port, BIT(pin));
250-
int pm_ret = pm_device_runtime_put(port);
226+
pm_ret = pm_device_runtime_put(port);
251227

252228
return (ret != 0) ? ret : pm_ret;
253229
}
@@ -349,10 +325,8 @@ static int gpio_nrfx_port_set_masked_raw(const struct device *port,
349325
return ret;
350326
}
351327

352-
gpio_nrfx_gpd_retain_clear(port, mask);
353328
nrf_gpio_port_out_set(reg, set_mask);
354329
nrf_gpio_port_out_clear(reg, clear_mask);
355-
gpio_nrfx_gpd_retain_set(port, mask);
356330
return pm_device_runtime_put(port);
357331
}
358332

@@ -367,9 +341,7 @@ static int gpio_nrfx_port_set_bits_raw(const struct device *port,
367341
return ret;
368342
}
369343

370-
gpio_nrfx_gpd_retain_clear(port, mask);
371344
nrf_gpio_port_out_set(reg, mask);
372-
gpio_nrfx_gpd_retain_set(port, mask);
373345
return pm_device_runtime_put(port);
374346
}
375347

@@ -384,9 +356,7 @@ static int gpio_nrfx_port_clear_bits_raw(const struct device *port,
384356
return ret;
385357
}
386358

387-
gpio_nrfx_gpd_retain_clear(port, mask);
388359
nrf_gpio_port_out_clear(reg, mask);
389-
gpio_nrfx_gpd_retain_set(port, mask);
390360
return pm_device_runtime_put(port);
391361
}
392362

@@ -404,10 +374,8 @@ static int gpio_nrfx_port_toggle_bits(const struct device *port,
404374
return ret;
405375
}
406376

407-
gpio_nrfx_gpd_retain_clear(port, mask);
408377
nrf_gpio_port_out_set(reg, set_mask);
409378
nrf_gpio_port_out_clear(reg, clear_mask);
410-
gpio_nrfx_gpd_retain_set(port, mask);
411379
return pm_device_runtime_put(port);
412380
}
413381

@@ -614,14 +582,10 @@ static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
614582

615583
static int gpio_nrfx_pm_suspend(const struct device *port)
616584
{
617-
#ifdef CONFIG_SOC_NRF54H20_GPD
585+
#if GPIO_HAS_PAD_GROUP
618586
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
619587

620-
if (cfg->pad_pd != NRF_GPD_FAST_ACTIVE1) {
621-
return 0;
622-
}
623-
624-
return nrf_gpd_release(NRF_GPD_FAST_ACTIVE1);
588+
return pm_device_runtime_put(cfg->pad_group);
625589
#else
626590
ARG_UNUSED(port);
627591
return 0;
@@ -630,14 +594,10 @@ static int gpio_nrfx_pm_suspend(const struct device *port)
630594

631595
static int gpio_nrfx_pm_resume(const struct device *port)
632596
{
633-
#ifdef CONFIG_SOC_NRF54H20_GPD
597+
#if GPIO_HAS_PAD_GROUP
634598
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
635599

636-
if (cfg->pad_pd != NRF_GPD_FAST_ACTIVE1) {
637-
return 0;
638-
}
639-
640-
return nrf_gpd_request(NRF_GPD_FAST_ACTIVE1);
600+
return pm_device_runtime_get(cfg->pad_group);
641601
#else
642602
ARG_UNUSED(port);
643603
return 0;
@@ -727,12 +687,11 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = {
727687
"Please enable GPIOTE instance for used GPIO port!")), \
728688
())
729689

730-
#ifdef CONFIG_SOC_NRF54H20_GPD
731-
#define PAD_PD(inst) \
732-
.pad_pd = DT_INST_PHA_BY_NAME_OR(inst, power_domains, pad, id, \
733-
NRF_GPD_SLOW_MAIN),
690+
#if GPIO_HAS_PAD_GROUP
691+
#define GPIO_NRF_PAD_GROUP_INIT(id) \
692+
.pad_group = DEVICE_DT_GET(DT_INST_CHILD(id, pad_group)),
734693
#else
735-
#define PAD_PD(inst)
694+
#define GPIO_NRF_PAD_GROUP_INIT(id)
736695
#endif
737696

738697
#define GPIO_NRF_DEVICE(id) \
@@ -753,7 +712,7 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = {
753712
(DT_PROP_OR(GPIOTE_PHANDLE(id), fixed_channels_supported, 0) ? \
754713
GPIOTE_FLAG_FIXED_CHAN : 0),) \
755714
) \
756-
PAD_PD(id) \
715+
GPIO_NRF_PAD_GROUP_INIT(id) \
757716
}; \
758717
\
759718
static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \

0 commit comments

Comments
 (0)