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[nrf fromtree] samples: nrfx_prs: Fix pin assignment on nRF5340 DK
Pins P0.06 and P0.07 are shorted on nRF5340 DKs prepared for on-target tests because that is required for UART tests. That causes background SPIM transfers in this sample to fail because SPIM is not able to drive its SCK line configured as P0.06. Rearrange then the pins used in this sample, so that SCK is not on a pin involved in a GPIO loopback. Signed-off-by: Andrzej Głąbek <[email protected]> (cherry picked from commit 9c874f0)
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samples/boards/nrf/nrfx_prs/boards/nrf5340dk_nrf5340_cpuapp.overlay

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,20 @@
11
&pinctrl {
22
spi1_default_alt: spi1_default_alt {
33
group1 {
4-
psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
5-
<NRF_PSEL(SPIM_MOSI, 0, 7)>;
4+
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
5+
<NRF_PSEL(SPIM_MOSI, 0, 6)>;
66
};
77
group2 {
8-
psels = <NRF_PSEL(SPIM_MISO, 0, 25)>;
8+
psels = <NRF_PSEL(SPIM_MISO, 0, 7)>;
99
bias-pull-down;
1010
};
1111
};
1212

1313
spi1_sleep_alt: spi1_sleep_alt {
1414
group1 {
15-
psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
16-
<NRF_PSEL(SPIM_MOSI, 0, 7)>,
17-
<NRF_PSEL(SPIM_MISO, 0, 25)>;
15+
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
16+
<NRF_PSEL(SPIM_MOSI, 0, 6)>,
17+
<NRF_PSEL(SPIM_MISO, 0, 7)>;
1818
low-power-enable;
1919
};
2020
};

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