Update to nrfx 3.7.0 and add support for nRF54H20 EngB #2076
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The following west manifest projects have been modified in this Pull Request:
Note: This message is automatically posted and updated by the Manifest GitHub Action. |
…TOEN read manner The new GRTC reading manner of the SYSCOUNTER uses hardware mechanism which allows to keep it alive when any of CPUs is not sleeping. Otherwise the SYSCOUNTER goes into sleep mode. Thus there is no longer need to maintain the `CONFIG_NRF_GRTC_SLEEP_ALLOWED` symbol, however if the user wants to have the SYSCOUNTER enabled all the time the `CONFIG_NRF_GRTC_ALWAYS_ON` can be used instead. The nrfx_grtc driver no longer provides the `wakeup-read-sleep` reading manner. Also setting the GRTC clock source is performed by the nrfx_grtc driver so it has been removed from the `sys_clock_driver_init()` function. Signed-off-by: Adam Kondraciuk <[email protected]> (cherry picked from commit bc7a5b6)
This reverts commit 3067153. Signed-off-by: Gerard Marull-Paretas <[email protected]>
This reverts commit bdcc7e6. Signed-off-by: Gerard Marull-Paretas <[email protected]>
This reverts commit 52f70da. Signed-off-by: Gerard Marull-Paretas <[email protected]>
nRF54H20 EngB is a re-label to the existing hardware revision for the nRF54H20. nRF54H20 (whithout EngX) is becoming the final revision of the SoC. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit a9d0eac)
This will be replaced by a different solution upstream (NCSDK-27673). Migrate the existing BICR bindings from NCS 2.4.99-cs3 to NCS 2.7.0. They are updated to remove obsoleted values. Enable generating bicr.hex for Application core by default. LFXO CLOAD value is a resualt of DK's characterization. The BICR LFOSC.LFXOCONFIG.MODE field supports disabling the usage of an external crystal oscillator to disable LFXO as LF clock source. Signed-off-by: Grzegorz Swiderski <[email protected]> Signed-off-by: Karol Lisak <[email protected]> Signed-off-by: Karsten Koenig <[email protected]>
Add support for nRF54H20 EngB in the Nordic HAL glue code. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 40f5ca0)
Make nrfs compatible with the EngB soc revision. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 72ab376)
So that any Haltium based SoC uses the same settings, including nRF54H20 EngB. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 5a4655f)
…nRF54H20 EngB Make sure cpuapp/cpurad cores are detected correctly when using nRF54H20 EngB. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 091e38b)
The current DK is labeled as revision 0.8.0. Until now, no revisions were needed, but a new hardware spin is coming, so we'll need to keep at least two revisions in the near future until the final one becomes the default. Prepare the board for that scenario. Note that the "old" nRF54H20 SoC is now nRF54H20 EngB. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 47212de)
Add a new revision for nRF54H20 DK: 0.9.0. This new hardware spin contains the final nRF54H20 SoC. Treat it as the default, including twister. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit df9a84e)
nRF54H HAL is not compatible with C++98, add new board revisions to the list so that they are skipped. Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit d3ca4fd)
Update the HW models module to: 85944c64f224406e4d781aa382c5f1f71ed307fd Including the following: * 5340: Allocate a buffer for the APP core RAM (2nd version) * 82ca90c Add NCS test-spec.yml to trigger downstream CI job * a05d7a6 docs: top README: Mention nrf54l15 support and minor fixes * cd64524 54 ECB/CCM tests: Remove comment which does not apply Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 942fa67)
…e libCs ssize_t is not part of the C library ISO standard subset, and as such one cannot expect a C library to expose the type by default. Some libraries like glibc do not expose this type in general, and trying to build using them results in build errors. There is 3 possible options: 1. Continue using ssize_t and: 1.a define _POSIX_C_SOURCE before including any header 1.b include sys/types.h directly (A bit uglier) 3. Not use ssize_t, and instead rely on ISO standard types Let's just go with 1.a assuming we want to keep using this type, as that is the correct way of getting this type defined. Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit b6f1767)
Update the HW models module to: bf8e45bd1f870e49cc15392e045c28d54ea12285 Including the following: * bf8e45b (52) CCM HAL: Support nrfx 3.7.0 with renamed TASK_CRYPT * 14c14d7 HW_models/NHW_GRTC: Support MDK not exposing SYSCOUNTERVALID * 6d66801 RADIO: Improve RSSISTART behaviour * ceb6a80 hal grtc: Add replacements for new int group functions * 838aa38 docs/README_HW_models: Add reference to Bsim HW models descr * 0ff34d7 docs: Several updates and fixes * 2972a93 AES_CCM: Avoid UBSAN pointer align warnwhen reading CNFPTR * f8cd477 UART: Minor bugfix: Set rx status to off during ENABLE Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 867e84c)
Add a function which can be used to remap embedded device address, into addresses which can be used in the simulated native boards. For the nrf_bsim boards we provide an actual implementation. For other boards, we provide an optional dummy version which does nothing. It is up to each board implementation to decide if they want to provide one or use the dummy. Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 5efe751)
Provide a new function for initializing the Rx side, so users do not need to initialize the pointers by hand if they did not use PBUF_DEFINE(). Let's also rename pbuf_init() to pbuf_tx_init() to clearly signify the previous function was only meant to be used by the Tx side. Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 5dc810e)
Add support in this IPC backends for POSIX arch targets in general, and ensure the nrf5340bsim defines the buffer which will be used. Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit b5b91b3)
…bsim Enable this sample for the nrf5340bsim Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit be35bbd)
Enable this sample for the nrf5340bsim Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit ca62ff8)
Enable this sample for the nrf5340bsim Signed-off-by: Alberto Escolar Piedras <[email protected]> (cherry picked from commit 13efb39)
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Increases default size of stack used by work queue RX thread from 1024 to 1280 to avoid memory issues. After adding the buffer with the default size of 128 that is allocated on the thread's stack (see #77552), there is too little stack left during heavy stress. Upstream PR: zephyrproject-rtos/zephyr#79557 Signed-off-by: Piotr Koziar <[email protected]>
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Update to nrfx 3.7.0 and add support for nRF54H20 EngB