diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi index fdc93408dd3..94cda5e8ee2 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi @@ -9,6 +9,7 @@ cpusec_cpuapp_ipc: ipc-1-2 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpusec_bellboard 12>, <&cpuapp_bellboard 0>; }; @@ -16,6 +17,7 @@ cpusec_cpurad_ipc: ipc-1-3 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpusec_bellboard 18>, <&cpurad_bellboard 0>; }; @@ -31,6 +33,7 @@ cpuapp_cpusys_ipc: ipc-2-12 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpuapp_bellboard 6>, <&cpusys_vevif 12>; }; @@ -38,6 +41,7 @@ cpuapp_cpuppr_ipc: ipc-2-13 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpuapp_bellboard 13>, <&cpuppr_vevif 12>; }; @@ -45,6 +49,7 @@ cpuapp_cpuflpr_ipc: ipc-2-14 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpuapp_bellboard 14>, <&cpuflpr_vevif 16>; }; @@ -52,6 +57,7 @@ cpurad_cpusys_ipc: ipc-3-12 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpurad_bellboard 6>, <&cpusys_vevif 18>; }; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_0_8_0.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_0_8_0.dtsi new file mode 100644 index 00000000000..940ac4d2391 --- /dev/null +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_0_8_0.dtsi @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &suit_storage_partition; + +/ { + reserved-memory { + suit_storage_partition: memory@e1eb000 { + reg = <0xe1eb000 DT_SIZE_K(24)>; + }; + }; +}; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_8_0.overlay new file mode 100644 index 00000000000..dfee18c5b6f --- /dev/null +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_0_8_0.overlay @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54h20dk_nrf54h20_0_8_0.dtsi" diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_0_8_0.overlay new file mode 100644 index 00000000000..dfee18c5b6f --- /dev/null +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_0_8_0.overlay @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54h20dk_nrf54h20_0_8_0.dtsi" diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_0_8_0.overlay new file mode 100644 index 00000000000..dfee18c5b6f --- /dev/null +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_0_8_0.overlay @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54h20dk_nrf54h20_0_8_0.dtsi" diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_0_8_0.overlay b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_0_8_0.overlay new file mode 100644 index 00000000000..dfee18c5b6f --- /dev/null +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_0_8_0.overlay @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54h20dk_nrf54h20_0_8_0.dtsi" diff --git a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf.dtsi b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf.dtsi index 906342f6f3d..0588e8d0801 100644 --- a/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf.dtsi +++ b/boards/nordic/nrf9280pdk/nrf9280pdk_nrf9280-ipc_conf.dtsi @@ -9,6 +9,7 @@ cpusec_cpuapp_ipc: ipc-1-2 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpusec_bellboard 12>, <&cpuapp_bellboard 0>; }; @@ -16,6 +17,7 @@ cpusec_cpurad_ipc: ipc-1-3 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpusec_bellboard 18>, <&cpurad_bellboard 0>; }; @@ -31,6 +33,7 @@ cpuapp_cpusys_ipc: ipc-2-12 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpuapp_bellboard 6>, <&cpusys_vevif 12>; }; @@ -38,6 +41,7 @@ cpuapp_cpuppr_ipc: ipc-2-13 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpuapp_bellboard 13>, <&cpuppr_vevif 12>; }; @@ -45,6 +49,7 @@ cpurad_cpusys_ipc: ipc-3-12 { compatible = "zephyr,ipc-icmsg"; status = "disabled"; + dcache-alignment = <32>; mboxes = <&cpurad_bellboard 6>, <&cpusys_vevif 18>; }; diff --git a/drivers/adc/adc_nrfx_saadc.c b/drivers/adc/adc_nrfx_saadc.c index e4c37a1f736..b8782d02454 100644 --- a/drivers/adc/adc_nrfx_saadc.c +++ b/drivers/adc/adc_nrfx_saadc.c @@ -66,9 +66,9 @@ BUILD_ASSERT((NRF_SAADC_AIN0 == NRF_SAADC_INPUT_AIN0) && "Definitions from nrf-adc.h do not match those from nrf_saadc.h"); #endif -#if defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) +#if defined(CONFIG_NRF_PLATFORM_HALTIUM) -/* nRF54H20 and nRF9280 always use bounce buffers in RAM */ +/* Haltium devices always use bounce buffers in RAM */ #define SAADC_MEMORY_SECTION \ COND_CODE_1(DT_NODE_HAS_PROP(DT_NODELABEL(adc), memory_regions), \ @@ -80,7 +80,7 @@ static uint16_t adc_samples_buffer[SAADC_CH_NUM] SAADC_MEMORY_SECTION; #define ADC_BUFFER_IN_RAM -#endif /* defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) */ +#endif /* defined(CONFIG_NRF_PLATFORM_HALTIUM) */ struct driver_data { struct adc_context ctx; @@ -669,7 +669,7 @@ static const struct adc_driver_api adc_nrfx_driver_api = { #endif #if defined(CONFIG_SOC_NRF54L15) .ref_internal = 900, -#elif defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) +#elif defined(CONFIG_NRF_PLATFORM_HALTIUM) .ref_internal = 1024, #else .ref_internal = 600, diff --git a/drivers/cache/Kconfig.nrf b/drivers/cache/Kconfig.nrf index c1cfc2c8c58..ffcbfe66d19 100644 --- a/drivers/cache/Kconfig.nrf +++ b/drivers/cache/Kconfig.nrf @@ -10,6 +10,6 @@ config CACHE_NRF_CACHE config CACHE_NRF_PATCH_LINEADDR bool "Patch lineaddr" - default y if SOC_NRF54H20 + default y if SOC_NRF54H20 || SOC_NRF54H20_ENGB help Manually set 28th bit in the LINEADDR in Trustzone Secure build. diff --git a/dts/bindings/arm/nordic,nrf-uicr-v2.yaml b/dts/bindings/arm/nordic,nrf-uicr-v2.yaml index f509fdf4061..9000cce94c5 100644 --- a/dts/bindings/arm/nordic,nrf-uicr-v2.yaml +++ b/dts/bindings/arm/nordic,nrf-uicr-v2.yaml @@ -17,10 +17,3 @@ properties: description: | Domain ID of the domain associated with this UICR instance. Must be unique across all UICR instances in the system. - - ptr-ext-uicr: - type: phandle - required: true - description: | - Handle of a memory region reserved to contain an Extended UICR instance. - The address of that node will be stored in the UICR.PTREXTUICR register. diff --git a/dts/common/nordic/nrf54h20.dtsi b/dts/common/nordic/nrf54h20.dtsi index 9af1488fd1b..c448455c579 100644 --- a/dts/common/nordic/nrf54h20.dtsi +++ b/dts/common/nordic/nrf54h20.dtsi @@ -148,16 +148,8 @@ #address-cells = <1>; #size-cells = <1>; - suit_storage_partition: memory@e1eb000 { - reg = <0xe1eb000 DT_SIZE_K(24)>; - }; - - cpurad_uicr_ext: memory@e1ff000 { - reg = <0xe1ff000 DT_SIZE_K(2)>; - }; - - cpuapp_uicr_ext: memory@e1ff800 { - reg = <0xe1ff800 DT_SIZE_K(2)>; + suit_storage_partition: memory@e1ed000 { + reg = <0xe1ed000 DT_SIZE_K(20)>; }; }; @@ -220,14 +212,12 @@ compatible = "nordic,nrf-uicr-v2"; reg = <0xfff8000 DT_SIZE_K(2)>; domain = <2>; - ptr-ext-uicr = <&cpuapp_uicr_ext>; }; cpurad_uicr: uicr@fffa000 { compatible = "nordic,nrf-uicr-v2"; reg = <0xfffa000 DT_SIZE_K(2)>; domain = <3>; - ptr-ext-uicr = <&cpurad_uicr_ext>; }; ficr: ficr@fffe000 { diff --git a/dts/common/nordic/nrf9280.dtsi b/dts/common/nordic/nrf9280.dtsi index 9949f6c9f1c..ae3ffc904d2 100644 --- a/dts/common/nordic/nrf9280.dtsi +++ b/dts/common/nordic/nrf9280.dtsi @@ -74,14 +74,6 @@ reserved-memory { #address-cells = <1>; #size-cells = <1>; - - cpurad_uicr_ext: memory@e401000 { - reg = <0xe401000 DT_SIZE_K(2)>; - }; - - cpuapp_uicr_ext: memory@e401800 { - reg = <0xe401800 DT_SIZE_K(2)>; - }; }; clocks { @@ -113,14 +105,12 @@ compatible = "nordic,nrf-uicr-v2"; reg = <0xfff8000 DT_SIZE_K(2)>; domain = <2>; - ptr-ext-uicr = <&cpuapp_uicr_ext>; }; cpurad_uicr: uicr@fffa000 { compatible = "nordic,nrf-uicr-v2"; reg = <0xfffa000 DT_SIZE_K(2)>; domain = <3>; - ptr-ext-uicr = <&cpurad_uicr_ext>; }; ficr: ficr@fffe000 { diff --git a/modules/hal_nordic/CMakeLists.txt b/modules/hal_nordic/CMakeLists.txt index eb85fd58f5e..3bed5a033b5 100644 --- a/modules/hal_nordic/CMakeLists.txt +++ b/modules/hal_nordic/CMakeLists.txt @@ -15,7 +15,7 @@ if(CONFIG_NRF_REGTOOL_GENERATE_BICR) list(APPEND nrf_regtool_components GENERATE:BICR) endif() if(DEFINED nrf_regtool_components) - find_package(nrf-regtool 5.6.0 REQUIRED + find_package(nrf-regtool 7.0.0 REQUIRED COMPONENTS ${nrf_regtool_components} PATHS ${CMAKE_CURRENT_LIST_DIR}/nrf-regtool NO_CMAKE_PATH diff --git a/modules/hal_nordic/Kconfig b/modules/hal_nordic/Kconfig index dd4e0a0859b..9d54c15d715 100644 --- a/modules/hal_nordic/Kconfig +++ b/modules/hal_nordic/Kconfig @@ -55,7 +55,7 @@ endchoice config NRF_802154_TEMPERATURE_UPDATE bool "nRF 802.15.4 temperature update" - default y if !SOC_NRF54H20 + default y if !SOC_NRF54H20 && !SOC_NRF54H20_ENGB help Enable temperature update for nRF 802.15.4 driver diff --git a/modules/hal_nordic/nrfs/Kconfig b/modules/hal_nordic/nrfs/Kconfig index 3eee664e480..8325c8db3bc 100644 --- a/modules/hal_nordic/nrfs/Kconfig +++ b/modules/hal_nordic/nrfs/Kconfig @@ -106,7 +106,7 @@ config NRFS_PMIC_SERVICE_ENABLED config NRFS_DVFS_SERVICE_ENABLED bool "DVFS service" depends on NRFS_HAS_DVFS_SERVICE - default y if SOC_NRF54H20_CPUAPP || SOC_NRF9280_CPUAPP + default y if SOC_NRF54H20_CPUAPP || SOC_NRF54H20_ENGB_CPUAPP || SOC_NRF9280_CPUAPP config NRFS_DIAG_SERVICE_ENABLED bool "System Diagnostics service (only for development purposes)" diff --git a/modules/hal_nordic/nrfs/dvfs/ld_dvfs.c b/modules/hal_nordic/nrfs/dvfs/ld_dvfs.c index 1faffbdb3c2..57ee0bdc375 100644 --- a/modules/hal_nordic/nrfs/dvfs/ld_dvfs.c +++ b/modules/hal_nordic/nrfs/dvfs/ld_dvfs.c @@ -269,7 +269,7 @@ int32_t ld_dvfs_configure_hsfll(enum dvfs_frequency_setting oppoint) freq_trim = 2; } -#if defined(CONFIG_SOC_NRF54H20_CPUAPP) || defined(CONFIG_SOC_NRF9280_CPUAPP) +#if defined(NRF_APPLICATION) hsfll_trim.vsup = NRF_FICR->TRIM.APPLICATION.HSFLL.TRIM.VSUP; hsfll_trim.coarse = NRF_FICR->TRIM.APPLICATION.HSFLL.TRIM.COARSE[freq_trim]; hsfll_trim.fine = NRF_FICR->TRIM.APPLICATION.HSFLL.TRIM.FINE[freq_trim]; diff --git a/scripts/west_commands/runners/nrf_common.py b/scripts/west_commands/runners/nrf_common.py index 6423253233c..a42e841bdbd 100644 --- a/scripts/west_commands/runners/nrf_common.py +++ b/scripts/west_commands/runners/nrf_common.py @@ -273,6 +273,11 @@ def program_hex(self): if self.erase: self.exec_op('erase', core='NRFDL_DEVICE_CORE_APPLICATION') self.exec_op('erase', core='NRFDL_DEVICE_CORE_NETWORK') + # A reset is needed if repartitioning the device memory + self.reset_target() + else: + # Ensure that firmware is not executing while erasing/programming + self.exec_op("reset", option="RESET_VIA_SECDOM") # Manage SUIT artifacts. # This logic should be executed only once per build. @@ -298,16 +303,8 @@ def program_hex(self): self.op_program(app_root_envelope_hex_file, 'ERASE_NONE', None, defer=True, core='NRFDL_DEVICE_CORE_APPLICATION') if cpuapp: - if not self.erase and self.build_conf.getboolean('CONFIG_NRF_REGTOOL_GENERATE_UICR'): - self.exec_op('erase', core='NRFDL_DEVICE_CORE_APPLICATION', - option={'chip_erase_mode': 'ERASE_UICR', - 'qspi_erase_mode': 'ERASE_NONE'}) core = 'NRFDL_DEVICE_CORE_APPLICATION' elif cpurad: - if not self.erase and self.build_conf.getboolean('CONFIG_NRF_REGTOOL_GENERATE_UICR'): - self.exec_op('erase', core='NRFDL_DEVICE_CORE_NETWORK', - option={'chip_erase_mode': 'ERASE_UICR', - 'qspi_erase_mode': 'ERASE_NONE'}) core = 'NRFDL_DEVICE_CORE_NETWORK' else: if self.erase: diff --git a/soc/nordic/common/vpr/Kconfig.sysbuild b/soc/nordic/common/vpr/Kconfig.sysbuild index 54464f10bc4..cfa42dd8667 100644 --- a/soc/nordic/common/vpr/Kconfig.sysbuild +++ b/soc/nordic/common/vpr/Kconfig.sysbuild @@ -4,7 +4,7 @@ config VPR_LAUNCHER bool "VPR launcher" default y - depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF54L15_ENGA_CPUFLPR || SOC_NRF54L15_CPUFLPR || SOC_NRF9280_CPUPPR) + depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_ENGB_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF54H20_ENGB_CPUFLPR || SOC_NRF54L15_ENGA_CPUFLPR || SOC_NRF54L15_CPUFLPR || SOC_NRF9280_CPUPPR) help Include VPR launcher in build. VPR launcher is a minimal sample built for an ARM core that starts given VPR core. diff --git a/soc/nordic/nrf54h/power.c b/soc/nordic/nrf54h/power.c index 1a59320d80b..8b73dbaee30 100644 --- a/soc/nordic/nrf54h/power.c +++ b/soc/nordic/nrf54h/power.c @@ -68,7 +68,7 @@ void nrf_poweroff(void) nrf_resetinfo_resetreas_local_set(NRF_RESETINFO, 0); nrf_resetinfo_restore_valid_set(NRF_RESETINFO, false); -#if !defined(CONFIG_SOC_NRF54H20_CPURAD) +#if !defined(NRF_RADIOCORE) /* Disable retention */ nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_MAIN, false); nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, false); @@ -98,7 +98,7 @@ static void s2idle_enter(uint8_t substate_id) case 1: /* Substate for idle with cache retained - not implemented yet. */ break; case 2: /* Substate for idle with cache disabled. */ -#if !defined(CONFIG_SOC_NRF54H20_CPURAD) +#if !defined(NRF_RADIOCORE) soc_lrcconf_poweron_request(node, NRF_LRCCONF_POWER_MAIN); #endif common_suspend(); @@ -127,7 +127,7 @@ static void s2idle_exit(uint8_t substate_id) break; case 2: /* Substate for idle with cache disabled. */ common_resume(); -#if !defined(CONFIG_SOC_NRF54H20_CPURAD) +#if !defined(NRF_RADIOCORE) soc_lrcconf_poweron_release(node, NRF_LRCCONF_POWER_MAIN); #endif default: /* Unknown substate. */ @@ -140,7 +140,7 @@ static void s2idle_exit(uint8_t substate_id) static void s2ram_exit(void) { common_resume(); -#if !defined(CONFIG_SOC_NRF54H20_CPURAD) +#if !defined(NRF_RADIOCORE) /* Re-enable domain retention. */ nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, true); #endif @@ -156,7 +156,7 @@ static int sys_suspend_to_ram(void) NRF_RESETINFO_RESETREAS_LOCAL_UNRETAINED_MASK); nrf_resetinfo_restore_valid_set(NRF_RESETINFO, true); -#if !defined(CONFIG_SOC_NRF54H20_CPURAD) +#if !defined(NRF_RADIOCORE) /* Disable retention */ nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, false); #endif diff --git a/subsys/logging/frontends/Kconfig b/subsys/logging/frontends/Kconfig index c232eb7354a..4d6d85e3e88 100644 --- a/subsys/logging/frontends/Kconfig +++ b/subsys/logging/frontends/Kconfig @@ -46,8 +46,9 @@ config LOG_FRONTEND_STMESP_DICT config LOG_FRONTEND_STMESP_FSC bool "Send fully self-contained messages" - select LOG_MSG_APPEND_RO_STRING_LOC if (!NRF_ETR && !SOC_NRF54H20_CPUPPR && \ - !SOC_NRF54H20_CPUFLPR) + select LOG_MSG_APPEND_RO_STRING_LOC if !(NRF_ETR || \ + SOC_NRF54H20_CPUPPR || SOC_NRF54H20_ENGB_CPUPPR || \ + SOC_NRF54H20_CPUFLPR || SOC_NRF54H20_ENGB_CPUFLPR) config LOG_FRONTEND_STMESP_FLUSH_COUNT int "Number of flushing words"