From e66e02995be68181c39bc9514c579f83069ba752 Mon Sep 17 00:00:00 2001 From: Adam Kondraciuk Date: Thu, 28 Aug 2025 17:10:52 +0200 Subject: [PATCH] [nrf fromtree] drivers: i2s: nrf_tdm: Allow using 8 channels TDM should have clock divider bypass enabled when calculated clock divider exceeds maximum allowed value which is `CKDIV2`. Signed-off-by: Adam Kondraciuk (cherry picked from commit 14b78981f739345e2a6687257797c977be2fb490) --- drivers/i2s/i2s_nrf_tdm.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/i2s/i2s_nrf_tdm.c b/drivers/i2s/i2s_nrf_tdm.c index c65edb2717b..45e5b3d1804 100644 --- a/drivers/i2s/i2s_nrf_tdm.c +++ b/drivers/i2s/i2s_nrf_tdm.c @@ -30,6 +30,10 @@ LOG_MODULE_REGISTER(tdm_nrf, CONFIG_I2S_LOG_LEVEL); */ #define NRFX_TDM_STATUS_TRANSFER_STOPPED BIT(1) +/* Maximum clock divider value. Corresponds to CKDIV2. */ +#define NRFX_TDM_MAX_SCK_DIV_VALUE TDM_CONFIG_SCK_DIV_SCKDIV_Max +#define NRFX_TDM_MAX_MCK_DIV_VALUE TDM_CONFIG_MCK_DIV_DIV_Max + #define NRFX_TDM_NUM_OF_CHANNELS (TDM_CONFIG_CHANNEL_NUM_NUM_Max + 1) #define NRFX_TDM_TX_CHANNELS_MASK \ @@ -814,11 +818,11 @@ static int trigger_start(const struct device *dev) nrf_tdm_sck_configure(drv_cfg->p_reg, drv_cfg->sck_src == ACLK ? NRF_TDM_SRC_ACLK : NRF_TDM_SRC_PCLK32M, - false); + nrfx_cfg->sck_setup > NRFX_TDM_MAX_SCK_DIV_VALUE); nrf_tdm_mck_configure(drv_cfg->p_reg, drv_cfg->mck_src == ACLK ? NRF_TDM_SRC_ACLK : NRF_TDM_SRC_PCLK32M, - false); + nrfx_cfg->mck_setup > NRFX_TDM_MAX_MCK_DIV_VALUE); /* If it is required to use certain HF clock, request it to be running * first. If not, start the transfer directly. */