diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7b6b292b5c1..46077fcd09a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -144,6 +144,13 @@ config ARM_ON_EXIT_CPU_IDLE
 	  observed on some SoCs caused by a memory access following WFI/WFE
 	  instructions.
 
+config SOC_PRE_RAM_HOOK
+	bool "include cpu start hook"
+	depends on CPU_CORTEX_M
+	help
+	  This hooks run almost after startup - even before any stack is initiated
+	  or RAM is accessed.
+
 rsource "core/Kconfig"
 rsource "core/Kconfig.vfp"
 
diff --git a/arch/arm/core/cortex_m/reset.S b/arch/arm/core/cortex_m/reset.S
index 6bdf8d4a8e9..b94cef9b8f2 100644
--- a/arch/arm/core/cortex_m/reset.S
+++ b/arch/arm/core/cortex_m/reset.S
@@ -35,6 +35,10 @@ GTEXT(z_arm_init_arch_hw_at_boot)
 #if defined(CONFIG_PM_S2RAM)
 GTEXT(arch_pm_s2ram_resume)
 #endif
+#if defined(CONFIG_SOC_PRE_RAM_HOOK)
+GTEXT(soc_pre_ram_hook)
+#endif
+
 
 /*
  * PACBTI Mask for CONTROL register:
@@ -100,18 +104,11 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
 
 #endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */
 
+#if defined(CONFIG_SOC_PRE_RAM_HOOK)
+    /* Call custom code that executes before any stack is set up or RAM memory is accessed */
+    bl soc_pre_ram_hook
+#endif
 #if defined(CONFIG_PM_S2RAM)
-#if DT_NODE_EXISTS(DT_NODELABEL(pm_s2ram_stack)) &&\
-	DT_NODE_HAS_COMPAT(DT_NODELABEL(pm_s2ram_stack), zephyr_memory_region)
-    /* In certain scenarios, the interrupt stack is actually not safe to overwrite.
-     * For example, when MCUboot is used, the bootloader's "z_interrupt_stack" and the
-     * loaded image's "z_interrupt_stacks" are NOT at the same address, and writing to
-     * the former would corrupt unrelated data from the loaded image. To support such
-     * scenarios, if the Device Tree provides a specially named "zephyr,memory-region",
-     * use it as the stack to run arch_pm_s2ram_resume instead of the interrupt stack.
-     */
-    ldr r0, =DT_REG_ADDR(DT_NODELABEL(pm_s2ram_stack)) + DT_REG_SIZE(DT_NODELABEL(pm_s2ram_stack))
-#else
     /*
      * Temporarily set MSP to interrupt stack so that arch_pm_s2ram_resume can
      * use stack for calling pm_s2ram_mark_check_and_clear.
@@ -124,7 +121,6 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
      * a short while, there is no change in behavior in either of the paths.
      */
     ldr r0, =z_interrupt_stacks + CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
-#endif
     msr msp, r0
 
     bl arch_pm_s2ram_resume
diff --git a/subsys/pm/Kconfig b/subsys/pm/Kconfig
index 53c649799cc..af0409de559 100644
--- a/subsys/pm/Kconfig
+++ b/subsys/pm/Kconfig
@@ -41,11 +41,6 @@ config PM_S2RAM
 	  When enabled on Cortex-M, and a 'zephyr,memory-region' compatible node with nodelabel
 	  'pm_s2ram' is defined in DT, _cpu_context symbol (located in arch/arm/core/cortex_m/pm_s2ram.c)
 	  is placed in linker section given by 'zephyr,memory-region' property of aforementioned node.
-	  Additionally on Cortex-M, if a 'zephyr,memory-region' compatible node with nodelabel
-	  'pm_s2ram_stack' is defined in DT, this region will be used as a temporary program stack
-	  for the S2RAM resume logic. The assembly reset handling code itself makes a single push of
-	  the return address, but the SoC-specific function (pm_s2ram_mark_check_and_clear) must be
-	  analyzed to determine the required stack size.
 
 config PM_S2RAM_CUSTOM_MARKING
 	bool "Use custom marking functions"