arm64: dts: rockchip: Add pwm node for rk1808

Change-Id: Idc7682b5badda2c1d522152bb7cca2b80a4a1139
Signed-off-by: David Wu <[email protected]>

Author: SuperDavidWu

arch/arm64/boot/dts/rockchip/rk1808.dtsi

@@ -87,6 +87,94 @@
 		#size-cells = <1>;
 	};
 
+	pwm0: pwm@ff3d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff3d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff3d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff3d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff3d8000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8000 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff3d8010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8010 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@fff3d8020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xfff3d8020 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff3d8030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8030 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@ff3f0000 {
 		compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xff3f0000 0x0 0x1000>;
@@ -205,4 +293,48 @@
 		reg-io-width = <4>;
 		status = "disabled";
 	};
+
+	pwm8: pwm@ff5d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm8_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@fff5d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm9_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@ff5d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm10_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@ff5d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		//pinctrl-names = "active";
+		//pinctrl-0 = <&pwm11_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
 };