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2 parents d3acd51 + 3aa0134 commit 33a4a1dCopy full SHA for 33a4a1d
README.md
@@ -80,6 +80,16 @@ benchmark](https://github.com/google/benchmark) frameworks respectively. You
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can configure meson to build them both by using `-Dbuild_tests=true` and
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`-Dbuild_benchmarks=true`.
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+### Note about building with avx512 by g++ v9 and v10
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+
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+There is a risk when compile with avx512 by g++ v9 and v10,
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+as some `MMX Technology` instructions is used by g++ v9/v10
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+without clearing fpu state.
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+Check [issue 154](https://github.com/intel/x86-simd-sort/issues/154)
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+for more details.
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+Adding `g++` option `-mno-mmx`, which disables `MMX Technology` instructions, is a possible workaround.
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## Example usage
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#### Sort an array of floats
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