@@ -469,10 +469,10 @@ X86_SIMD_SORT_INLINE type_t get_pivot_64bit(type_t *arr,
469469
470470template <typename vtype, typename argtype, typename type_t >
471471X86_SIMD_SORT_INLINE void argsort_ (type_t *arr,
472- arrsize_t *arg,
473- arrsize_t left,
474- arrsize_t right,
475- arrsize_t max_iters)
472+ arrsize_t *arg,
473+ arrsize_t left,
474+ arrsize_t right,
475+ arrsize_t max_iters)
476476{
477477 /*
478478 * Resort to std::sort if quicksort isnt making any progress
@@ -498,17 +498,16 @@ X86_SIMD_SORT_INLINE void argsort_(type_t *arr,
498498 argsort_<vtype, argtype>(
499499 arr, arg, left, pivot_index - 1 , max_iters - 1 );
500500 if (pivot != biggest)
501- argsort_<vtype, argtype>(
502- arr, arg, pivot_index, right, max_iters - 1 );
501+ argsort_<vtype, argtype>(arr, arg, pivot_index, right, max_iters - 1 );
503502}
504503
505504template <typename vtype, typename argtype, typename type_t >
506505X86_SIMD_SORT_INLINE void argselect_ (type_t *arr,
507- arrsize_t *arg,
508- arrsize_t pos,
509- arrsize_t left,
510- arrsize_t right,
511- arrsize_t max_iters)
506+ arrsize_t *arg,
507+ arrsize_t pos,
508+ arrsize_t left,
509+ arrsize_t right,
510+ arrsize_t max_iters)
512511{
513512 /*
514513 * Resort to std::sort if quicksort isnt making any progress
@@ -545,10 +544,10 @@ template <typename T,
545544 template <typename ...>
546545 typename half_vector>
547546X86_SIMD_SORT_INLINE void xss_argsort (T *arr,
548- arrsize_t *arg,
549- arrsize_t arrsize,
550- bool hasnan = false ,
551- bool descending = false )
547+ arrsize_t *arg,
548+ arrsize_t arrsize,
549+ bool hasnan = false ,
550+ bool descending = false )
552551{
553552 /* TODO optimization: on 32-bit, use full_vector for 32-bit dtype */
554553 using vectype = typename std::conditional<sizeof (T) == sizeof (int32_t ),
@@ -585,17 +584,19 @@ X86_SIMD_SORT_INLINE void avx512_argsort(T *arr,
585584 bool hasnan = false ,
586585 bool descending = false )
587586{
588- xss_argsort<T, zmm_vector, ymm_vector>(arr, arg, arrsize, hasnan, descending);
587+ xss_argsort<T, zmm_vector, ymm_vector>(
588+ arr, arg, arrsize, hasnan, descending);
589589}
590590
591591template <typename T>
592592X86_SIMD_SORT_INLINE void avx2_argsort (T *arr,
593- arrsize_t *arg,
594- arrsize_t arrsize,
595- bool hasnan = false ,
596- bool descending = false )
593+ arrsize_t *arg,
594+ arrsize_t arrsize,
595+ bool hasnan = false ,
596+ bool descending = false )
597597{
598- xss_argsort<T, avx2_vector, avx2_half_vector>(arr, arg, arrsize, hasnan, descending);
598+ xss_argsort<T, avx2_vector, avx2_half_vector>(
599+ arr, arg, arrsize, hasnan, descending);
599600}
600601
601602/* argselect methods for 32-bit and 64-bit dtypes */
@@ -605,10 +606,10 @@ template <typename T,
605606 template <typename ...>
606607 typename half_vector>
607608X86_SIMD_SORT_INLINE void xss_argselect (T *arr,
608- arrsize_t *arg,
609- arrsize_t k,
610- arrsize_t arrsize,
611- bool hasnan = false )
609+ arrsize_t *arg,
610+ arrsize_t k,
611+ arrsize_t arrsize,
612+ bool hasnan = false )
612613{
613614 /* TODO optimization: on 32-bit, use full_vector for 32-bit dtype */
614615 using vectype = typename std::conditional<sizeof (T) == sizeof (int32_t ),
@@ -635,10 +636,10 @@ X86_SIMD_SORT_INLINE void xss_argselect(T *arr,
635636
636637template <typename T>
637638X86_SIMD_SORT_INLINE void avx512_argselect (T *arr,
638- arrsize_t *arg,
639- arrsize_t k,
640- arrsize_t arrsize,
641- bool hasnan = false )
639+ arrsize_t *arg,
640+ arrsize_t k,
641+ arrsize_t arrsize,
642+ bool hasnan = false )
642643{
643644 xss_argselect<T, zmm_vector, ymm_vector>(arr, arg, k, arrsize, hasnan);
644645}
@@ -650,7 +651,8 @@ X86_SIMD_SORT_INLINE void avx2_argselect(T *arr,
650651 arrsize_t arrsize,
651652 bool hasnan = false )
652653{
653- xss_argselect<T, avx2_vector, avx2_half_vector>(arr, arg, k, arrsize, hasnan);
654+ xss_argselect<T, avx2_vector, avx2_half_vector>(
655+ arr, arg, k, arrsize, hasnan);
654656}
655657
656658#endif // XSS_COMMON_ARGSORT
0 commit comments