Implement ppp over uart

Author: object-Object

.vscode/settings.json

@@ -10,7 +10,8 @@
     "rust-analyzer.linkedProjects": [
         "rust/mlogv32/Cargo.toml",
         "rust/demo_no_alloc/Cargo.toml",
-        "rust/sortKB/Cargo.toml"
+        "rust/sortKB/Cargo.toml",
+        "rust/ppp/Cargo.toml"
     ],
     "rust-analyzer.check.allTargets": false,
     "rust-analyzer.cargo.features": "all",

rust/mlogv32/src/io.rs

@@ -1,8 +1,8 @@
-use core::arch::asm;
+use core::{arch::asm, hint};
 
 #[cfg(feature = "alloc")]
 use alloc::string::ToString;
-use uart::{address::MmioAddress, Data, Uart};
+use uart::{address::MmioAddress, Data, FifoControl, LineStatus, Uart};
 
 pub use uart;
 
@@ -56,16 +56,115 @@ pub fn print_flush() {
 const UART0_ADDRESS: usize = 0xf0000010;
 const UART1_ADDRESS: usize = 0xf0000030;
 
+pub enum UartAddress {
+    Uart0,
+    Uart1,
+}
+
+impl UartAddress {
+    unsafe fn get_address(&self) -> MmioAddress {
+        let base = match self {
+            UartAddress::Uart0 => UART0_ADDRESS,
+            UartAddress::Uart1 => UART1_ADDRESS,
+        };
+        MmioAddress::new(base as *mut u8, 4)
+    }
+}
+
 /// # Safety
 ///
 /// This function is unsafe because the caller must ensure that only one instance exists at a time, as it represents a physical memory-mapped peripheral.
 pub unsafe fn get_uart0() -> Uart<MmioAddress, Data> {
-    unsafe { Uart::new(MmioAddress::new(UART0_ADDRESS as *mut u8, 4)) }
+    unsafe { Uart::new(UartAddress::Uart0.get_address()) }
 }
 
 /// # Safety
 ///
 /// This function is unsafe because the caller must ensure that only one instance exists at a time, as it represents a physical memory-mapped peripheral.
 pub unsafe fn get_uart1() -> Uart<MmioAddress, Data> {
-    unsafe { Uart::new(MmioAddress::new(UART1_ADDRESS as *mut u8, 4)) }
+    unsafe { Uart::new(UartAddress::Uart0.get_address()) }
+}
+
+pub struct UartPort {
+    uart: Uart<MmioAddress, Data>,
+    fifo_capacity: usize,
+    fifo_len: usize,
+}
+
+impl UartPort {
+    /// # Safety
+    ///
+    /// This function is unsafe because the caller must ensure that only one instance of each device exists at a time, as it represents a physical memory-mapped peripheral.
+    pub unsafe fn new(device: UartAddress) -> Self {
+        Self {
+            uart: Uart::new(device.get_address()),
+            fifo_capacity: 1,
+            fifo_len: 0,
+        }
+    }
+
+    /// # Safety
+    ///
+    /// This function is unsafe because the caller must ensure that only one instance of each device exists at a time, as it represents a physical memory-mapped peripheral. The caller must also ensure that the fifo capacity is correct.
+    pub unsafe fn new_with_fifo(device: UartAddress, fifo_capacity: usize) -> Self {
+        Self {
+            uart: Uart::new(device.get_address()),
+            fifo_capacity,
+            fifo_len: 0,
+        }
+    }
+
+    pub fn init(&mut self) {
+        self.uart.write_fifo_control(
+            FifoControl::ENABLE | FifoControl::CLEAR_RX | FifoControl::CLEAR_TX,
+        );
+    }
+
+    pub fn read(&mut self, buf: &mut [u8]) -> usize {
+        for (i, item) in buf.iter_mut().enumerate() {
+            if let Some(byte) = self.read_byte() {
+                *item = byte;
+            } else {
+                return i;
+            }
+        }
+        buf.len()
+    }
+
+    pub fn read_byte(&mut self) -> Option<u8> {
+        if self
+            .uart
+            .read_line_status()
+            .contains(LineStatus::DATA_AVAILABLE)
+        {
+            Some(self.uart.read_byte())
+        } else {
+            None
+        }
+    }
+
+    pub fn write(&mut self, buf: &[u8]) {
+        for &byte in buf {
+            self.write_byte(byte);
+        }
+    }
+
+    pub fn write_byte(&mut self, byte: u8) {
+        while !self.try_write_byte(byte) {
+            hint::spin_loop();
+        }
+    }
+
+    pub fn try_write_byte(&mut self, byte: u8) -> bool {
+        if self.uart.read_line_status().contains(LineStatus::THR_EMPTY) {
+            self.fifo_len = 0
+        }
+        if self.fifo_len < self.fifo_capacity {
+            self.uart.write_byte(byte);
+            self.fifo_len += 1;
+            true
+        } else {
+            false
+        }
+    }
 }

rust/ppp/.cargo/config.toml

@@ -0,0 +1,31 @@
+[build]
+target = "riscv32imac-unknown-none-elf"
+rustflags = [
+    "-C", "link-arg=-Tlink.x",
+    "-C", "target-feature=-c",
+]
+
+[unstable]
+build-std = ["core", "compiler_builtins"]
+
+[alias]
+rbuild = "build --release"
+rb = "rbuild"
+
+rsize = "size --release"
+
+robjdump = [
+    "objdump",
+    "--release",
+    "--",
+    "--disassemble",
+    "--no-show-raw-insn",
+]
+rod = "robjdump"
+
+robjcopy = [
+    "objcopy",
+    "--release",
+    "--",
+    "--output-target", "binary",
+]

rust/ppp/Cargo.lock

@@ -0,0 +1,17 @@
+[package]
+name = "ppp"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+mlogv32 = { path = "../mlogv32" }
+ppproto = "0.2.1"
+
+[profile.dev]
+
+[profile.release]
+panic = "abort"
+# values: 2, 3, s, z
+opt-level = 3
+overflow-checks = false
+lto = true

rust/ppp/Cargo.toml

@@ -0,0 +1,23 @@
+# ppp
+
+Based on the example in https://github.com/embassy-rs/ppproto/blob/bd16b3093fe2ededb4fd7662ed253d7bc6b39a9b/README.md.
+
+Steps:
+
+- Make sure UART_FIFO_CAPACITY in the CONFIG proc is set to 253.
+- Start the mlogv32-utils socket server.
+- Run each of the following commands in a separate terminal (replace `127.0.0.1` with your [host ip](https://superuser.com/a/1679774) if using WSL):
+
+  ```sh
+  # show log output from uart0
+  echo '{"type":"serial","device":"uart0","stopOnHalt":false,"overrun":false}' | netcat -v 127.0.0.1 5000
+
+  # relay socket server to pty
+  socat -v -x TCP4:127.0.0.1:5000 PTY,link=pty,rawer
+
+  # connect pppd to uart1
+  sudo pppd $PWD/pty 9600 192.168.7.1:192.168.7.10 ms-dns 8.8.4.4 ms-dns 8.8.8.8 connect "echo '{\"type\":\"serial\",\"device\":\"uart1\",\"stopOnHalt\":false,\"overrun\":false}'" nodetach debug local persist silent noproxyarp noauth
+  ```
+
+- Build and flash this program to mlogv32, then start the processor.
+- Run `ping 192.168.7.10` to ping the processor.

rust/ppp/README.md

@@ -0,0 +1,4 @@
+[toolchain]
+channel = "nightly-2025-06-10"
+components = ["rust-src"]
+targets = ["riscv32imac-unknown-none-elf"]